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Texas Instruments SCAN50C400AUT Peripheral ICs
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	SCAN50C400AUT		1,625			1 - 10 - 100 - 1000 - 10000 -	Get Quote

SCAN50C400A Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF	PDF Size	Page count
SCAN50C400A		National Semiconductor	SCAN50C400 - 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver		Original	PDF	1.18MB	28
SCAN50C400AUT		National Semiconductor	1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver		Original	PDF	858.24KB	29

SCAN50C400A Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
HR4nC Abstract: AN1328 Contextual Info: OBSOLETE SCAN50C400 www.ti.com SNOSA22G – MAY 2004 – REVISED MARCH 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver Check for Samples: SCAN50C400 FEATURES • • • • • • • • • 1 2 • • • Quad Backplane SERDES transceiver	Original	SCAN50C400 SNOSA22G SCAN50C400A HR4nC AN1328	PDF
AA10 Abstract: AA13 AB14 P802 SCAN50C400A SCAN50C400AUT UFJ440A AN-124 AN-1242 national Contextual Info: February 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board	Original	SCAN50C400A SCAN50C400A AA10 AA13 AB14 P802 SCAN50C400AUT UFJ440A AN-124 AN-1242 national	PDF
ht4 marking Contextual Info: February 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board	Original	SCAN50C400A SCAN50C400A ht4 marking	PDF
AN-1242 national Contextual Info: SCAN50C400 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver Literature Number: SNOSA22G February 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane	Original	SCAN50C400 SCAN50C400A SNOSA22G AN-1242 national	PDF
AA10 Abstract: AA13 P802 SCAN50C400A SCAN50C400AUT UFJ440A MDIO communication protocol AN1242 HT4 MARKING Contextual Info: SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board	Original	SCAN50C400A SCAN50C400A CSP-9-111C2) CSP-9-111S2) CSP-9-111S2. AA10 AA13 P802 SCAN50C400AUT UFJ440A MDIO communication protocol AN1242 HT4 MARKING	PDF
HR4nC Abstract: t25VD AN-1242 Contextual Info: OBSOLETE SCAN50C400 www.ti.com SNOSA22H – JANUARY 2004 – REVISED APRIL 2013 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver Check for Samples: SCAN50C400 FEATURES DESCRIPTION • • • • • The SCAN50C400A is a four-channel high-speed	Original	SCAN50C400 SNOSA22H SCAN50C400A HR4nC t25VD AN-1242	PDF
DS90LV47 Abstract: 640Mbps EPM240 SCAN50C400A EQ50F100 SCAN50C400 Contextual Info: MISC_92 FPGA Flyer 2/7/05 1:00 PM Page 1 National’s high-speed interface solutions: Simplifying and enhancing FPGA system design Serializers and deserializers Clock and data distribution LVDS crosspoint switches N ational Semiconductor is the leader in innovation and	Original	DS90LV001 DS90LV110A SCANSTA111/112 DS90LV47 640Mbps EPM240 SCAN50C400A EQ50F100 SCAN50C400	PDF
LM2857 Abstract: LM3871 sot23 jsw jsw soic LM3871-Adj EP1C40 LM387M lm2679-adj S0T23 DS90LV47 Contextual Info: 2 H I B I i Î Ê » l 2 Altera FPGAfil- C P L D * l-Ha =\|^ s.\| 2005^71 o > t e z i # Stratix II F P G A # Aft ^ ss 1 Stratix F P G A # M jA l^ s ] S S 2 Cyclone F P G A # m m e la s i s s . 3 M AX II C P L D # f l f l M W U s\| S S !	OCR Scan	H05L3 2005tÂ LM2857 LM3871 sot23 jsw jsw soic LM3871-Adj EP1C40 LM387M lm2679-adj S0T23 DS90LV47	PDF
lm3371 Abstract: LM3871 LM267M pj87 LM6642 EP1C40 lm3870 S0T23-B lm2679-adj s0123 Contextual Info: iü M iü ü itfï l U Altera PFPG R C P L D rfn iS ^ ftl^ ! m * 2 0 0 5 ^ 7 ^ >-s MAltera » >m m m u x m i& n & im M v in & m m i fp g a a Stratix II FPGA m & x m . 1 (GELD) » J Ë » j i M S Ï ^ $ 3 RÎ Zfcill Altera Stratix® ' Stratix H® '	OCR Scan		PDF