SDM RECEIVER Search Results

2948B

Abstract: Avionics
Contextual Info: Avionics Option 25 Avionics option for the 2948B Low Phase Noise Communications Service Monitor Communication and ramp testing of military and commercial aircraft in one instrument • Avionics modes for ILS, VOR, marker beacons and SELCAL • Displays in avionics terms: SDM, DDM,

NAV-750C

Abstract: SDM receiver Radio Direction Finder signal generator Avionics marker beacon rf direction finder two Tone generator aeroflex 2031 marker beacon receiver
Contextual Info: Signal Sources Option 6 Avionics Signal Generator 2030/40/50 series Setting the standard in avionics testing. Option provides accurate ILS, VOR, ADF, marker beacon and SELCAL signals for testing avionics receivers • Accurate ILS and VOR RF waveforms •

NAV-750C

Abstract: 480 MHz generator Radio Direction Finder marker beacon aeroflex 2031 Avionics
Contextual Info: Signal Sources Option 6 Avionics Signal Generator 2030/40/50 series Setting the standard in avionics testing. Option 6 provides accurate ILS, VOR, ADF, marker beacon and SELCAL signals for testing avionics receivers • Accurate ILS and VOR RF waveforms

ED57

Abstract: vor antenna marker beacon antenna NAV-750C vehicle transponder DME 40 rf beacon distance marker beacon receiver VOR Antenna design ils antenna
Contextual Info: Application Note Instrument Landing System ILS and Distance Measuring Equipment (DME) Ground Receiver and Monitor Alarm Testing Ensuring the safe guidance and exact positioning of air traffic is dependent upon regular and accurate testing of the ILS and DME monitor alarms that provide early

Contextual Info: Multiservice Clock Generator AD9551 Preliminary Technical Data FEATURES OVERVIEW Translation between any two standard network rates Dual reference inputs and dual clock outputs Pin programmable for standard network rate translation SPI programmable for arbitrary rational rate translation

PS306

Contextual Info: Multiservice Clock Generator AD9551 Preliminary Technical Data FEATURES OVERVIEW Translation between any two standard network rates Dual reference inputs and dual clock outputs Pin programmable for standard network rate translation SPI programmable for arbitrary rational rate translation

Crystal 26mhz

Abstract: NX3225SA 26MHZ Crystal_26MHz
Contextual Info: Multiservice Clock Generator AD9551 Reference conditioning and switchover circuitry internally synchronizes the two references so that if one reference fails, there is virtually no phase perturbation at the output. FEATURES Translation between any two standard network rates

Crystal 26mhz

Abstract: NX3225SA 26MHZ fractional N PLL 349-440 SDM receiver GR-1244-CORE JESD51-2 NX3225SA Crystal_26MHz
Contextual Info: Multiservice Clock Generator AD9551 Reference conditioning and switchover circuitry internally synchronizes the two references so that if one reference fails, there is virtually no phase perturbation at the output. FEATURES Translation between any two standard network rates

Contextual Info: Multiservice Clock Generator AD9551 Reference conditioning and switchover circuitry internally synchronizes the two references so that if one reference fails, there is virtually no phase perturbation at the output. FEATURES Translation between any two standard network rates

AD9552

Abstract: JESD51-2 NX3225SA 571200-A258-001 siward
Contextual Info: Oscillator Frequency Upconverter AD9552 FEATURES GENERAL DESCRIPTION Converts a low frequency input reference signal to a high frequency output signal Input frequencies from 6.6 MHz to 112.5 MHz Output frequencies up to 900 MHz Preset pin programmable frequency translation ratios

Siward crystal xtal

Abstract: SIWARD 2520 NX3225SA 571200-A258-001 ad9552 JESD51-2 40178 37403 SIWARD 25 MHZ crystal
Contextual Info: Oscillator Frequency Upconverter AD9552 FEATURES GENERAL DESCRIPTION Converts a low frequency input reference signal to a high frequency output signal Input frequencies from 6.6 MHz to 112.5 MHz Output frequencies up to 900 MHz Preset pin programmable frequency translation ratios

Contextual Info: Oscillator Frequency Upconverter AD9552 FEATURES GENERAL DESCRIPTION Converts a low frequency input reference signal to a high frequency output signal Input frequencies from 6.6 MHz to 112.5 MHz Output frequencies up to 900 MHz Preset pin programmable frequency translation ratios

Siward crystal xtal

Abstract: 1611328 SDM receiver
Contextual Info: Oscillator Frequency Upconverter AD9552 Data Sheet FEATURES GENERAL DESCRIPTION Converts a low frequency input reference signal to a high frequency output signal Input frequencies from 6.6 MHz to 112.5 MHz Output frequencies up to 900 MHz Preset pin programmable frequency translation ratios

AD9552

Abstract: JESD51-2 NX3225SA
Contextual Info: Oscillator Frequency Upconverter AD9552 FEATURES GENERAL DESCRIPTION Converts a low frequency input reference signal to a high frequency output signal Input frequencies from 6.6 MHz to 112.5 MHz Output frequencies up to 900 MHz Preset pin programmable frequency translation ratios

toyocom vco

Abstract: 1611328 toyocom 10m
Contextual Info: Oscillator Frequency Upconverter AD9552 FEATURES GENERAL DESCRIPTION Converts a low frequency input reference signal to a high frequency output signal Input frequencies from 6.6 MHz to 125 MHz Output frequencies up to 900 MHz Preset pin-programmable frequency translation ratios

vor antenna

Abstract: marker beacon antenna microprocessor in radio transmitters Antenna VOR marker beacon receiver aircraft VHF receiver AM MODULATOR Avionics VOR Antenna design omni vhf antenna
Contextual Info: Application Note Instrument Landing System Receiver Testing The 2030/40/50 Series Signal Generators are available with Option 6, which adds an ILS Instrument Landing System and VOR (VHF Omni Range) waveform generator to the modulation system. The performance of this

LSISAS2X36

Abstract: sas2x36 LSI LSISAS2x36 LSISAS2x LSISAS6160 expanders SFF-8088 DSASW00232864 future domain scsi
Contextual Info: LSISAS6160 SAS Switch User Guide Revision 1.1 September 2010 Revision History Version and Date Revision 1.1, Septembre 2010 Description of Changes First channel release. LSI and the LSI logo are trademarks or registered trademarks of LSI Corporation or its subsidiaries. All other brand and product names may be trademarks of their respective companies.

M5317TDE

Abstract: GR-1343 NT6M72HA NTFX34AA AMADNS NT1X80BA NT1X80AA M5112 NT0X63LA nortel dms dpp
Contextual Info: DMS-100/200 Portfolio Evolution 3Q99 THE THIRTEENTH IN A SERIES OF BULLETINS THAT ANNOUNCES UPDATES TO THE EVOLUTION OF THE DMS SYSTEM PORTFOLIO IN THE PREVIOUS QUARTERS. COMMENTS AND SUGGESTIONS? Your comments and suggestions are important in helping us create marketing literature that meets your needs. If

AN2853

Abstract: AN2864 MCF5235 MPC5500 MPC5554 uart_ppc_example.c
Contextual Info: Freescale Semiconductor Application Note AN2853 Rev. 0.1, 10/2004 Using the Universal Asynchronous Receiver Transmitter UART eTPU Function by: Vernon Goler 32-Bit Embedded Controller Division This application note is intended to provide simple C interface functions to the eTPU Universal Asynchronous

uart_ppc_example.c

Abstract: AN2853 MPC5566 AN2864 MCF5235 MPC5500 MPC5554 MPC5565 MPC5567 MPC5500 Configuration and Initialization
Contextual Info: Freescale Semiconductor Application Note Using the Universal Asynchronous Receiver Transmitter UART eTPU Function by: Vernon Goler 32-Bit Embedded Controller Division This application note is intended to provide simple C interface functions to the eTPU Universal Asynchronous

cd8383

Abstract: 14d271 1611328 BS270 BF174
Contextual Info: FEATURES Low jitter, low phase noise multi-output clock generator for data communications applications including Ethernet, Fibre Channel, SONET, SDH, PCI-e, SATA, PTN, OTN, ADC/DAC, and digital video Spread spectrum clocking GENERAL DESCRIPTION The AD9577 provides a multioutput clock generator function

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM REFSEL XT1 XT2 XTAL OSC CMOS REFOUT REFCLK DIVIDE 1 OR 2 VCO 2.15GHz TO 2.55GHz FEEDBACK DIVIDER THIRD ORDER LPF PLL2 LVPECL/LVDS OR 2 x CMOS LVPECL/LVDS OR 2 × CMOS LDO VCO 2.15GHz TO 2.55GHz FEEDBACK DIVIDER SCL SDA DIVIDERS DIVIDERS

14d271

Abstract: cd8383
Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM REFSEL XT1 XT2 XTAL OSC CMOS REFOUT REFCLK DIVIDE 1 OR 2 VCO 2.15GHz TO 2.55GHz FEEDBACK DIVIDER THIRD ORDER LPF PLL2 LVPECL/LVDS OR 2 x CMOS LVPECL/LVDS OR 2 × CMOS LDO VCO 2.15GHz TO 2.55GHz FEEDBACK DIVIDER SCL SDA DIVIDERS DIVIDERS

rohde UPA audio analyzer

Abstract: BIT 3251 circuit diagram of MOD 100 counter using ic 7490 am2 SOCKET PIN LAYOUT NAV-750C SERVICE MANUAL oscilloscopes pm 3210 circuit diagram of MOD 8 counter using ic 7490 rohde UPA equivalent des circuit integre ttl amd am2 socket pin diagram
Contextual Info: SIGNAL GENERATOR NAV-750C Operating Manual Document part no. 46892/293 Issue 8 17 May 2007 Operating Manual SIGNAL GENERATOR NAV-750C 10 kHz to 1.35 GHz This manual applies to instruments with software issues of 8.09 and higher. Aeroflex International Ltd. 2007