SE 135 PIN CONFIGURATION Search Results

CRT9006-135

Abstract: CRT9006 CRT9006-83 B135 crt5037 5037 crt crt 9006-135
Contextual Info: CRT 9006-135 CRT 9006-83 STANDARD MICROSYSTEMS CORPORATION Single Row Buffer SRB PIN CONFIGURATION D O U T3 D O U T2 DOUT1 D O U T0 C LK C C C Cl Cl 1 ^ 24 2 23 3 22 4 21 5 |- •n 20 6\ I 19 - J 8 Cl W REN C C LRCNT 3 ID =1 ID ID ID ID Ci GND DO U T4

IC CD 4027 pin diagram

Abstract: IC 4027 pin diagram pin diagram for IC 4027 IC CD 4027 IC 4027 pin configuration RAC14 14 pin ic 4027
Contextual Info: 4027-2/4027-3/4027-4-F,l,N PIN CONFIGURATION FEATURES • All inputs including clock TTL compatible • On chip latches for address, chip select and data in • 3-state TTL compatible output • Output data is latched and valid into next cycle • Access time:

2N5465

Abstract: 2N5460 2N5460-2N5465 SST5461
Contextual Info: P-Channel JFET Low Noise Amplifier C Q IO Q IC CORPORATION 2N5460- 2N5465/ SST5460- SST5465 ABSOLUTE MAXIMUM RATINGS T a =• 25°C unless otherwise specified PIN CONFIGURATION * Drain-Gate or Source-Gate Voltage 2N5460 - 2N5462 .-40V

117 AJG

Abstract: sf 128 d l5
Contextual Info: M ITSUBISH I LSI« G M IC R O M 33241GS ' C M O S D M A C O N T R O L L E R M 3 2 /D M A C DESCRIPTION M 3 3 2 4 1 G S ( M 3 2 / D M A C ) is an ad va n ce d and high per­ PIN CONFIGURATION (BOTTOM VIEW) form ance D M A controller ca pab le of a c c e s sin g a 32-bit

2N5458

Abstract: JFET 2N5457 2N5457-2N5459
Contextual Info: _ _ l- W itU I O Q I C \J N-Channel JFET General Purpose Amplifier/Switch CORPORATION 2N5457-2N5459 ABSOLUTE MAXIMUM RATINGS Ta = 25°C unless otherwise noted PIN CONFIGURATION f I Drain-Gate Voltage .25V

MSD6100

Contextual Info: MSD6100 silicon Silicon epitaxial dual switching diode, designed for use in high speed switching applications, features high breakdown voltage, low capacitance and space saving common-cathode configuration. 1 2 f CASE 29 3 rj S T Y L E 3: \ ° ° ° (TO-92)

IC 4164

Abstract: 4164-2 RAM 4164 ram 4164 ram mos 4164 4164-2 HYB4164 RAM 4164 4164 eve
Contextual Info: SIEM EN S HYB 4164-1, HYB 4164-2, HYB 4164-3 65,536-Bit Dynamic Random Access Memory RAM • 65,536 X1 bit organization • All inputs and outputs T T L com patible • Industry standard 16-pin JE D E C configuration • High over- and undershooting capability

Contextual Info: G M 71V 65803C G M 71V S65803C L 8,388,608 W O R D S x 8 BIT CMOS DYNAMIC RAM D escription Pin Configuration T h e GM 71V S 65803C/ C L i s t h e n ew generation dynamic RA M organized 8,388,608 w o r d s by 8 b i t s. T h e G M 71V (S)65803C/ C L utilizes advanced CM O S Silicon Gate Process

Contextual Info: HY51V65800, HY51V64800 •HYUNDAI 8M x 8-bit CMOS DRAM with Fast Page Mode PRELIMINARY DESCRIPTION ORDERING INFORMATION T his fam ily is a 64M bit d yn a m ic RAM organized 8,388,608 x 8-bit configuration w ith Fast Page mode CM O S DRAMs. Fast Page m ode offers high speed

2032VE

Abstract: 2032VE-180LT44 2032ve-110lt48 2032ve180lt44i 2032VE-110LT44 2032ve-110lb49
Contextual Info: ispLSI 2032VE Device Datasheet June 2010 Select Devices Discontinued! Product Change Notification PCN #09-10 has been issued to discontinue select devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes.

Contextual Info: nt Encapsulated PC Transformers 1VA - 160VA Power Transformers 1VA - 7.5kVA Encapsulated Styles 1VA - 500VA Special Mounting Configurations In Standard Configurations and to Customer Specifications magnetics nuvotem Toroidal Transformers for Universal Application

Contextual Info: Configuration EPROMs for FLEX Devices June 1996, ver. 5 Data Sheet Features S erial E PR O M fam ily fo r c o n fig u rin g FLEX d ev ice s S im p le, e asy -to -u se 4 -p in in terfa ce to FLEX d ev ice s L ow c u rre n t d u rin g c o n fig u ra tio n a n d n e a r-z e ro s ta n d b y c u rre n t

ES8388

Contextual Info: G M 71V 65803C G M 71V S65803C L 8,388,608 W O R D S x 8 BIT CMOS DYNAMIC RAM D escription Pin Configuration T h e GM 71V S 65803C/ C L i s t h e n ew generation dynamic RA M organized 8,388,608 w o r d s by 8 b i t s. T h e G M 71V (S)65803C/ C L utilizes advanced CM O S Silicon Gate Process

Contextual Info: G M 71V 65803C G M 71V S65803C L 8,388,608 W O R D S x 8 BIT CMOS DYNAMIC RAM D escription Pin Configuration T h e GM 71V S 65803C/ C L i s t h e n ew generation dynamic RA M organized 8,388,608 w o r d s by 8 b i t s. T h e G M 71V (S)65803C/ C L utilizes advanced CM O S Silicon Gate Process

IDT70121

Abstract: IDT70125 IDT70121S
Contextual Info: HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ High-speed access – Commercial: 25/35/45/55ns max. Low-power operation – IDT70121/70125S Active: 675mW (typ.) Standby: 5mW (typ.) – IDT70121/70125L

ISPLSI 2032A-180LTN44

Abstract: 80LT44 2032A 2032E 44-PIN 48-PIN ISPLSI 2032A-110LTN44
Contextual Info: LeadFree Package Options Available! ispLSI 2032/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS GLB Logic Array A6 D Q D Q A5 D Q EW A4 0139Bisp/2000 FO R N fmax = 180 MHz Maximum Operating Frequency tpd = 5.0 ns Propagation Delay

Contextual Info: ispLSI 2032/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS GLB Logic Array A6 D Q D Q A5 D Q EW A4 0139Bisp/2000 R N fmax = 180 MHz Maximum Operating Frequency tpd = 5.0 ns Propagation Delay Description FO • IN-SYSTEM PROGRAMMABLE

44-PIN

Abstract: 20041a 2032A isp 2032 SE 135 pin configuration
Contextual Info: ispLSI 2032/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS GLB Logic Array A6 D Q D Q A5 D Q EW A4 0139Bisp/2000 R N fmax = 180 MHz Maximum Operating Frequency tpd = 5.0 ns Propagation Delay Description FO • IN-SYSTEM PROGRAMMABLE

SECTION 1

Abstract: 60Hz Transformers TESLA MA 1458 Halogen lighting toroidal transformer FERRITE TRANSFORMER 20khz toroid MA 1458, TESLA transformer 3000va toroidal transformer 120v VDE 0570 EN61558 E215495
Contextual Info: nt Encapsulated PC Transformers 1VA - 160VA Power Transformers 1VA - 7.5kVA Encapsulated Styles 1VA - 500VA Special Mounting Configurations In Standard Configurations and to Customer Specifications magnetics nuvotem Toroidal Transformers for Universal Application

Contextual Info: nt Encapsulated PC Transformers 1VA - 160VA Power Transformers 1VA - 7.5kVA Encapsulated Styles 1VA - 500VA Special Mounting Configurations In Standard Configurations and to Customer Specifications magnetics nuvotem Toroidal Transformers for Universal Application

74HC253p

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M74HC253P/FP/DP DUAL 4 -IN P U T DATA S E L E C T O R /M U L T IP L E X E R W ITH 3-S TA TE O U TPU TS DESCRIPTION The M 74H C 253 is a sem ico nductor integrated circuit con­ PIN CONFIGURATION TOP VIEW sisting of tw o 4-lin e to 1-line data se le cto rs/m u ltip le xrs with

NE5009

Abstract: NE5009F SE5009F SE5009 5009C
Contextual Info: NE5009-F.N • SE5009-F DESCRIPTION PIN CONFIGURATION The 5009 m o n o lith ic 8-b it d ig ita l-to -a n a lo g c o n v e rte r is an e le c tric a l selectio n o f the 5007/8 series o f 8 -b it D /A converters. Rela­ tive a ccu ra cy is sp e cifie d to + 1/ 4LSB m a xi­

J201 equivalent

Abstract: J201-J204 J202 equivalent J201 j204 J203 sg-5010 j201 jfet x0035
Contextual Info: D IM m ü ^lölL J201-J204 N-Chanriel J F E T FEATURES PIN CONFIGURATION • High Input Impedance IQ = 35pA Typ. • Low IQSS (IGSS = 100pA max) CHIP TOPOGRAPHY TO-92 5010 „ .00254.0035) „ .002S(.0635) , .OOM(.MM) .0G35(.0M9) ABSOLUTE MAXIMUM RATINGS (25 °C)

ISPLSI 2032A-180LTN44

Abstract: 2032A 44-PIN 2032A-135LT441 2032A-80Ltn
Contextual Info: LeadFree Package Options Available! ispLSI 2032/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS S Logic Array A6 D Q D Q A5 D Q EW Input Bus GLB A4 0139Bisp/2000 FO R N fmax = 180 MHz Maximum Operating Frequency