SF00140 Search Results

Contextual Info: Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flops without reset FEATURE 74F113 PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C CP0 1 14 VCC K0 2 13 CP1 DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features

74F113

Abstract: I74F113D I74F113N N74F113D N74F113N
Contextual Info: INTEGRATED CIRCUITS 74F113 Dual J-K negative edge-triggered flip-flops without reset Product specification IC15 Data Handbook Philips Semiconductors 1991 Feb 14 Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flops without reset

Contextual Info: Philips Semiconductors Product specification Dual J - K negative edge-triggered flip-flops without reset FEATURE 7 4 F 11 o 1J PIN CONFIGURATION • Industrial temperature range available -40°C to +85°C CFO [ 7 1 3 Vcc DESCRIPTION K0 [ T ]3 | CP1 The 74F113, dual negative edge-triggered JK-type flip-tlop, features