SN65LVDS Search Results

Contextual Info: BATA TRANSMISSION R e d u c e Y o u r C a b le C o s t s w it h L V D S S e r ia liz e r / D e - s e r ia liz e r SNG5LVD S9 3 , SNE5LVDS94 > • S U S in ► SNB5 LVD S9 5 , SN65LVDS96 > S8.35 i» quantitits of 18BB ► E V IV I T he new est Low Voltage bus structures with no loss in data

LVDS050

Abstract: LVDS051 LVDS180 SN65LV0S050
Contextual Info: DATA TRANSMISSION Increase Signaling Rates and Low er Pow er w ith LVDS Dual and Single Drivers/Receivers SN65LV0S050, SN65LVDS051 > $ 3 .74 in q u an tities o f 1000 SN65LVDS17S > - S 2 .1 3 in q u an titie s o f l i O L ow Voltage Differential Signaling

Contextual Info: DATA TRANSMISSION Backplane Bridging is Easy w ith SN65LVDS22 and SN 65LVD M 22 M U X Repeaters SN65LVDS22 M U X table ► $311 SN 65LV D M 22 ► $3.84 in quantifias « 1 1 * ilabile in IG-pin SOIC D AT A GLANCE * • High signaling rates 400 Mbps High impedance drivers

SN65LVDS32A

Contextual Info: SN65LVDS32B, SN65LVDT32B, SN65LVDS3486B SN65LVDT3486B, SN65LVDS9637B, SN65LVDT9637B HIGH-SPEED DIFFERENTIAL RECEIVERS SLLS440 – OCTOBER 2000 D D D D D D D D D D D D Meets or Exceeds the Requirements of ANSI EIA/TIA-644 Standard for Signaling Rates† up to 400 Mbps

Contextual Info: SN65LVDS387, SN75LVDS387, SN65LVDS389, SN75LVDS389 HIGH-SPEED DIFFERENTIAL LINE DRIVERS SLLS362A – SEPTEMBER 1999 – REVISED SEPTEMBER 1999 D D D D D D D D D D D Eight ’389 or Sixteen (’387) Line Drivers Meet or Exceed the Requirements of ANSI EIA/ TIA-644 Standard

Contextual Info: SN65LVDS1050 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS SLLS343A – APRIL 1999 – REVISED MARCH 2000 D D D D D D D D D D D Typically Meets or Exceeds ANSI TIA/EIA-644-1995 Standard Operates From a Single 2.4-V to 3.6-V Supply Signaling Rates up to 400 Mbit/s

Contextual Info: SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS SLLS262I – JULY 1997 – REVISED SEPTEMBER 2000 The intended application of these devices and signaling technique is both point-to-point and multidrop one driver and multiple receivers data

hp310

Contextual Info: SN65LVDS16, SN65LVP16 SN65LVDS17, SN65LVP17 www.ti.com SLLS625B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS • FEATURES • • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Clock Rates to 2 GHz

Contextual Info: SN65LVDS18, SN65LVP18 SN65LVDS19, SN65LVP19 www.ti.com SLLS624B – SEPTEMBER 2004 – REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS • FEATURES • • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Clock Rates to 1 GHz

SN65LVDT3486B

Abstract: AM26LS32 MC3486 SN65LVDS32B SN65LVDS3486B SN65LVDS9637B SN65LVDT32B SN65LVDT9637B SN65LVDS32A
Contextual Info: SN65LVDS32B, SN65LVDT32B SN65LVDS3486B, SN65LVDT3486B SN65LVDS9637B, SN65LVDT9637B www.ti.com SLLS440B – OCTOBER 2000 – REVISED APRIL 2007 HIGH-SPEED DIFFERENTIAL RECEIVERS FEATURES • • • • • • • • • • • • Meets or Exceeds the Requirements of ANSI

SN65LVDM22

Abstract: SN65LVDS122 SN65LVDS122D SN65LVDS122PW SN65LVDS22 SN65LVDT122 SN65LVDT122D
Contextual Info: SN65LVDS122 SN65LVDT122 www.ti.com SLLS525B – MAY 2002 – REVISED JUNE 2004 1.5-Gbps 2 x 2 LVDS CROSSPOINT SWITCH FEATURES • DESCRIPTION Designed for Signaling Rates Up To 1.5 Gbps Total Jitter < 65 ps Pin-Compatible With SN65LVDS22 and SN65LVDM22 25 mV of Receiver Input Threshold Hysteresis

sublvds to lvds

Abstract: sub-lvds sublvds TX B0177 link budget calculation 3 POSITION TOGGLE SWITCH 6 pin s0224 sublvds SLLS836 SN65LVDS305
Contextual Info: SN65LVDS310 www.ti.com SLLS836 – MAY 2007 PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER FEATURES • • • • • • • • • • • Serial Interface Technology Compatible With FlatLink 3G Transmitters E.g., SN65LVDS305 or SN65LVDS307 Supports Video Interfaces up to 24-Bit RGB

Contextual Info: SN65LVDS1, SN65LVDS2, SN65LVDT2 HIGHĆSPEED DIFFERENTIAL LINE DRIVER/RECEIVERS ą ąą SLLS373G − JULY 1999 − REVISED NOVEMBER 2004 D Meets or Exceeds the ANSI TIA/EIA-644A Standard D Designed for Signaling Rates† up to: D D D D D D D D D D D D SN65LVDS2 and SN65LVDT2

Contextual Info: SN65LVDS179, SN65LVDS180 SN65LVDS050, SN65LVDS051 www.ti.com SLLS301L – APRIL 1998 – REVISED FEBRUARY 2005 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS FEATURES • • • • • • • • • • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard

OMAP3630

Contextual Info: SN65LVDS311 www.ti.com SLLSE31 – MAY 2010 PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER Check for Samples: SN65LVDS311 FEATURES 1 • • • • • • • • • 2.8 x 2.8mm package size 1.8V input signal swing 24-Bit RGB Data, 3 Control Bits, 1 Parity Bit

Contextual Info: SN55LVDS32, SN65LVDS32 SN65LVDS3486, SN65LVDS9637 www.ti.com SLLS262Q – JULY 1997 – REVISED JULY 2007 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS The intended application of these devices and signaling technique is both point-to-point and multidrop one driver and multiple receivers data

Contextual Info: SN65LVDS349 www.ti.com SLLSE23 – SEPTEMBER 2010 QUAD HIGH-SPEED DIFFERENTIAL RECEIVER Check for Samples: SN65LVDS349 FEATURES 1 • • • • • Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard Single-Channel Signaling Rates up to 560 Mbps

k4005

Abstract: LVDT388 SN65 SN65LVDS388 SN65LVDT388 SN75LVDS388 SN75LVDT388 422B
Contextual Info: SN65LVDS388, SN65LVDT388, SN75LVDS388, SN75LVDT388 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS SLLS448A – SEPTEMBER 2000 – REVISED MAY 2001 D D D D D D D D D D D Eight Line Receivers Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard Integrated 110-Ω Line Termination

LVDT388

Abstract: SN65 SN65LVDS388 SN65LVDT388 SN75LVDS388 SN75LVDT388 422B
Contextual Info: SN65LVDS388, SN65LVDT388, SN75LVDS388, SN75LVDT388 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS SLLS448A – SEPTEMBER 2000 – REVISED MAY 2001 D D D D D D D D D D D Eight Line Receivers Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard Integrated 110-Ω Line Termination

LVDS250

Abstract: LVDT250 SN65LVDS250 SN65LVDS250DBT SN65LVDT250 SN65LVDT250DBT
Contextual Info: SN65LVDS250 SN65LVDT250 www.ti.com SLLS594B – MARCH 2004 – REVISED OCTOBER 2004 LVDS 4x4 CROSSPOINT SWITCH FEATURES • • • • • • • • • • • SN65LVDS250DBT Marked as LVDS250 SN65LVDT250DBT ( Marked as LVDT250) (TOP VIEW) Greater Than 2.0 Gbps Operation

marking B2Z

Abstract: MARKING c1y
Contextual Info: SN65LVDS116 www.ti.com SLLS370D – SEPTEMBER 1999 – REVISED FEBRUARY 2005 16-PORT LVDS REPEATER FEATURES • • • • • • • • • • • One Receiver and Sixteen Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard Typical Data Signaling Rates to 400 Mbps or

A115-A

Abstract: C101 SN65LVDS305 SN65LVDS305ZQER SN65LVDS306
Contextual Info: SN65LVDS305 www.ti.com SLLS744A – AUGUST 2006 – REVISED JANUARY 2007 PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER FEATURES • • • • • • • • • • • • • • FlatLink 3G Serial-Interface Technology Compatible With FlatLink3G Receivers Such

C101

Abstract: SN65LVDS20 SN65LVP20
Contextual Info: SN65LVDS20 SN65LVP20 www.ti.com SLLS620A – JUNE 2004 – REVISED SEPTEMBER 2005 LVPECL AND LVDS REPEATER/TRANSLATOR WITH ENABLE FEATURES • • Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs Signaling Rates to 4 Gbps or Clock Rates to 2 GHz

SN65LVDS1DBV

Abstract: marking SABI lvdt SN65LVDS1 SN65LVDS1D SN65LVDS2 SN65LVDS2D SN65LVDS2DBV SN65LVDT2 SN65LVDT2DBV
Contextual Info: SN65LVDS1, SN65LVDS2, SN65LVDT2 HIGHĆSPEED DIFFERENTIAL LINE DRIVER/RECEIVERS ą ąą SLLS373G − JULY 1999 − REVISED NOVEMBER 2004 D Meets or Exceeds the ANSI TIA/EIA-644A Standard D Designed for Signaling Rates† up to: D D D D D D D D D D D D SN65LVDS2 and SN65LVDT2