SN74 Search Results

54HC573

Contextual Info: SN54HC573, SN74HC573 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D26B4. DECEMBER 1982-REVISED SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads • Bus-Structured Pinout Package Options Include Plastic "Small

Contextual Info: TYPES SN54H103, SN74H103 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR R E V I S E D D E C E M B E R 1983 SN 5 4 H 1 0 3 . . . J OR W P A C K A G E S N 7 4 H 103 . . . J OR N P A C K A G E P a c k a g e O p tio n s Include Plastic and C eram ic D IP s

A1619A

Abstract: b1241
Contextual Info: SN54ABT32318, SN74ABT32318 18-BIT TRI-PORT UNIVERSAL BUS EXCHANGERS SCBS180A-JUNE 1 9 9 2 - REVISED JULY 1994 Members of the Texas Instruments Wldebus+ Family State-of-the-Art EPIC-IlB™ BICMOS Design Significantly Reduces Power Dissipation Typical V q l p Output Ground Bounce

Contextual Info: SN54ALS259, SN74ALS259 8 BIT AD D R E S S A B LE LA TC HES D2661, DECEMBER 1982-REVISED MAY 1986 S N 5 4 A L S 2 5 9 . J PACKAGE S N 7 4 A L S 2 5 9 . . . D OR N PACKAGE 8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel Conversion with Storage

SN74HC74

Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS094A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D , Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

Contextual Info: SN5409, SN54LS09, SN54S09, SN7409, SN74LS09, SN74S09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS DECEMBER 1 9 8 3 -R E V IS E D M A R C H 1 9 8 8 Package Options Include Plastic "Sm all Outline" P ackages, Ceram ic Chip Carriers and Flat P ackages, and Plastic and Ceram ic

Contextual Info: SN74BCT29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER S C B S 257- SEPTEMBER 1987 - REVISED NOVEMBER 1993 DW OR NT PACKAGE • BICMOS Process With TTL Inputs and Outputs T O P V IE W • State-of-the-Art BICMOS Design Significantly Reduces Standby Current

IR 30 D1

Contextual Info: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O

Contextual Info: SN54ALS05A, SN74ALS05A HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS S D A S 1 9 0 A - APRIL 1982 - R EVISED DECEMBER 1994 Package Options Include Plastic Small-Outllne D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mll DIPs

Contextual Info: SN74F378 HEX D-TYPE FLIP-FLOP WITH CLOCK ENABLE S D FS 030B - D2932, M ARCH 1987 - REVISED O CTO B ER 1993 Contains Six D-Type Flip-Flops With Single-Rail Outputs Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Buffered Common Enable Input

74AS374

Abstract: IC CLK 374 74ALS374A
Contextual Info: SN74ALS374A, SN74AS374, SN54ALS374A, SN54AS374 OCTAL D-TYPE EDGE-TRIGGERED FUP-FLOPS WITH 3-STATE OUTPUTS D 2 6 6 1 , A P H IL 1982 - R E V IS E D M A Y 1986 D-Type Flip-Flops In a Single Package S N 5 4 A L S 3 7 4 A , S N 5 4 A S 3 7 4 . . . J PAC KAG E

of ic 74180

Contextual Info: TYPES SN54180, SN74180 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS D E C E M B E R 1 9 7 2 - R E V I S E D D E C E M B E R 1 9 83 S N 5 4 1 8 0 . . J O R W P A C K A G E SN 74180 . J O R N P A C K A G E T O P V IE W F U N C T IO N T A B L E OUTPUTS IN P U T S

IC SN74HC

Abstract: SN74HCTOO SN74HC
Contextual Info: SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE NANO GATES D 3 2 4 3 , NOVEMBER 1968 Inputs are TTL-Voftage Compatible S N 54H C T00 S N 74H C T00 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil

Contextual Info: SN54HCT534, SN74HCT534 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 0 4 , M A R CH 1 9 8 4 - R E V IS E D S EP T EM B ER 1 987 • Inputs are TTL-Voltage Compatible • High-Current 3-State Inverting Outputs Can Drive Up to 15 LSTTL Loads

Q193

Abstract: lj11
Contextual Info: PRODUCT PREVIEW SN54AS29821, SN54AS29822, SN74AS29821, SN74AS29822 10-BIT BUS INTERFACE FLIP FLOPS WITH 3 STATE OUTPUTS D 2 8 2 5 , MAY 1986 Designed to be Interchangeable w ith A M D A M 2 9 8 2 1 and A M 2 9 8 2 2 SN 54A S29821 . . . JT PACKAGE SN 74A S29821 . . . DW OR NT PACKAGE

Contextual Info: SN54ALS29823, SN74ALS29823 9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS S D A S 1 4 6 B -J A N U A R Y 198« - R EVISED JANUARY 1995 Functionally Equivalent to AMD’s AM29823 Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With

56DL

Abstract: SN74AS841
Contextual Info: TYPES SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D TYPE LATCHES WITH 3 STATE OUTPUTS D 2 8 2 5 , DECEMBER 1983 • 3-State Buffer-Type Outputs Drive Bus-Lines Directly • Bus-Structured Pinout

74LS169BN

Abstract: 74S169
Contextual Info: TYPES SN54LS169B, SN54S168, SN54S169, SN74LS169B, SN74S168, SN74S169 SYNCHRONOUS 4-BIT UP/DOWN COUNTERS OCTOBER 1976 —REVISED MAY 1983 S168 . . . SYNCHRONOUS UP/DOW N DECADE COUNTERS 'LS169B, 'S169 . . . SYNCHRONOUS UP/DO W N BINARY COUNTERS SN 54S 168, 5N 54LS169B, S N 54S 169 . . . J OB W PACKAGE

Contextual Info: SN54HC563, SN74HC563 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads S N 5 4 H C 5 6 3 . . . J P AC KAG E S N 7 4 H C 5 6 3 . . . D W OR N P AC KA G E

7476 ic specifications

Abstract: ic 7476 IC 7476 JK logic diagram of ic 7476 7476 logic diagram 7476 ic
Contextual Info: SN547G, SN54LS76A, SN7476, SN74LS76A DUAL J-K FLIP-FLOPS WITH PRESET AND CLEAR D EC EM BE R 1 9 8 3 -R E V IS E D M A R C H • Dependable Texas Instruments Quality and Reliability TO P V IE W ] *^16 : i k iclkC 15 H 1 Q 1 prëC 2 14 : i q 1clrC 3 13 DGND

LVC244

Contextual Info: I SN74LVC241 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SGAS343 - MARCH 1994 DB, DW, OR PW PACKAGE TOP VIEW E P IC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V q lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C Typical V q HV (Output V qh Undershoot)

54151A

Contextual Info: TYPES SN54150, SN54151A. SN54152A, SN54LS151, SN54LS152, SN54S151, SN74150, SN741S1A, SN74LS151, SN74S151 DATA SELECTORS/MULTIPLEXERS D E C E M B E R 1 9 7 2 - R E V IS E D D E C E M B E R 1983 SN 5 41 5 0 . . J OR W PACKAG E S N 7 4 1 5 0 . . J OR N PACKAGE

i486

Contextual Info: SN74BCT2141 2-WAY 8K x 18 SYNCHRONOUS CACHE DATA RAM D3613. A UG UST 1990 2-Way 8K x 18 Bit Architecture FN PACKAGE TOP VIEW Synchronous Read and Write Access at 50 MHz Clock Frequency Incorporates Burst Counter for Burst-Read (Read-Hit) Cycles or Burst-Write (Line-Fill)

IC 7482

Abstract: ttl 7482 462ci sn7462
Contextual Info: TTL MSI TYPES SN5482, SN7482 2-BIT BINARY FULL ADDERS B U L L E T IN N O . O L -S 7 21 1836, D E C E M B E R 1972 SN 5482 . . . J O R W P A C K A G E SN 7482 . . J O R N P A C K A G E T O P V IE W For applications in: • Digital Computer Systems • Data-Handling Systems