SN74AUC2G79 Search Results

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

A115-A

Abstract: C101 SN74AUC2G79 SN74AUC2G79YEPR
Contextual Info: SN74AUC2G79 SINGLE POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP SCES536 − DECEMBER 2003 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

A115-A

Abstract: C101 SN74AUC2G79 SN74AUC2G79YEPR
Contextual Info: SN74AUC2G79 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP SCES536A − DECEMBER 2003 − REVISED SEPTEMBER 2004 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O

A115-A

Abstract: C101 SN74AUC2G79 SN74AUC2G79YZPR U-79 SN74AUC2G79DCUR
Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

A115-A

Abstract: C101 SN74AUC2G79 SN74AUC2G79YZPR SN74AUC2G79DCUR
Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

A115-A

Abstract: C101 SN74AUC2G79 SN74AUC2G79YEPR
Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

A115-A

Abstract: C101 SN74AUC2G79 SN74AUC2G79YZPR SN74AUC2G79DCUR
Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

SN74AUC2G79DCUR

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

Contextual Info: SN74AUC2G79 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP www.ti.com SCES536C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

74AUP2G79

Abstract: 74AUP2G79DC 74AUP2G79GM 74AUP2G79GT SN74AUC2G79 SN74AUC2G79DCTR
Contextual Info: SLG74LB2G79 GreenLIBTM DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP General Description Features The GreenLIB provides a low-power, low-voltage dual • Pb-Free / RoHS Compliant positive-edge-triggered D-type flip-flop. When data at the • Halogen-Free data D input meets the setup time requirement, the data is

PLL WITH VCO 4046 appli note philips

Abstract: CD74HC4050 marking microstar ms 4011 CI 40106 8952 microcontroller ic 4017 decade counter datasheet ic HC 4066 AG GK 7002 7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION LA 4508 as af power amplifier
Contextual Info: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,

SN74LVC1g

Abstract: Fairchild 1G125 SMD 5PIN LOGIC GATE 7404 ttl inverter 7404 not gate 1g125 sn74auc2g74 Dual Analog Switches p174stx1G SMD SINGLE GATE
Contextual Info: R E L I A B E. L L O G I C. I N N O V A T I O N. LITTLE LOGIC SELECTION GUIDE CBT DBV AHCT DCK CBTD CBTLV DBV DBV DCK DCK DBV AHC DBV DCK AUC DBV 5 LVC DBV(6) DCK(5) DCT DCK DBV(5) DCT DCK(5) YEA DCK(6) DCU YZA DBV(6) YEA DCK(6) DCU YZA (actual size of chip)