SN74FB165 Search Results

Contextual Info: SN74FB1650 18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178K – AUGUST 1992 – REVISED AUGUST 1999 D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA BIAS VCC Minimizes Signal Distortion

Contextual Info: SN54FB1653, SN74FB1653 17-BIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVERS WITH BUFFERED CLOCK LINES S C BS 702A -A U G U S T 1997-R E V IS E D FEBRUARY 1998 Compatible With IEEE Std 1194.1-1991 BTL Selectable Clock Delay LVTTL A Port, Backplane Transceiver Logic

Contextual Info: SN74FB1653 17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702H − AUGUST 1997 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL LVTTL A Port, Backplane Transceiver Logic

Contextual Info: SN74FB1650 18ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178O − AUGUST 1992 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

Contextual Info: SN74FB1650 18ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178O − AUGUST 1992 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

Contextual Info: SN74FB1653 17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702H − AUGUST 1997 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL LVTTL A Port, Backplane Transceiver Logic

FB1651

Abstract: SN74FB1651 SN74FB1651PCA
Contextual Info: SN74FB1651 17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS177M – OCTOBER 1993 – REVISED JUNE 2001 D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

FB1653

Abstract: MS-026 SN74FB1653 SN74FB1653PCA SN74FB1653PCAG4 S-PQFP-G100
Contextual Info: SN74FB1653 17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702H − AUGUST 1997 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL LVTTL A Port, Backplane Transceiver Logic

FB1650

Abstract: MS-026 SN74FB1650 SN74FB1650PCA SN74FB1650PCAG4 S-PQFP-G100 2AO5
Contextual Info: SN74FB1650 18ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178O − AUGUST 1992 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

FB1653

Abstract: SN74FB1653 SN74FB1653PCA
Contextual Info: SN74FB1653 17-BIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702F – AUGUST 1997 – REVISED MAY 2002 D D D D Compatible With IEEE Std 1194.1-1991 BTL LVTTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

1A01

Abstract: 1A07 1Bt 87 1A06 1A08 1A09 2A01 2A02 2A03 SN54FB1650
Contextual Info: SN54FB1650, SN74FB1650 18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVERS SCBS178C - AUGUST 1992 - REVISED JULY 1994 Compatible With IEEE 1194.1-1991 BTL and IEEE 896.2-1991 (Futu rebus*) Standards B-Port Biasing Network Preconditions the Connector and PC Trace to the Backplane

2AO5

Abstract: FB1650 MS-026 SN74FB1650 SN74FB1650PCA S-PQFP-G100 2ao8 2aO6
Contextual Info: SN74FB1650 18ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178O − AUGUST 1992 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

FB1653

Abstract: MS-026 SN74FB1653 SN74FB1653PCA S-PQFP-G100
Contextual Info: SN74FB1653 17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702H − AUGUST 1997 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL LVTTL A Port, Backplane Transceiver Logic

SN74FB1650

Contextual Info: SN74FB1650 18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178L – AUGUST 1992 – REVISED SEPTEMBER 1999 D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA BIAS VCC Minimizes Signal Distortion

2AO5

Abstract: CONNECTOR 5 PIN FB1650 SN54FB1650 SN74FB1650
Contextual Info: SN54FB1650, SN74FB1650 18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVERS SCBS178G – AUGUST 1992 – REVISED AUGUST 1996 D D D D Compatible With IEEE 1194.1-1991 BTL Standard TTL A Port, Backplane Transceiver Logic B Port Open-Collector B-Port Outputs Sink

2aO6

Abstract: FB1650 MS-026 SN74FB1650 SN74FB1650PCA SN74FB1650PCAG4 S-PQFP-G100
Contextual Info: SN74FB1650 18ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178O − AUGUST 1992 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

FB1653

Abstract: SN74FB1653 SN74FB1653PCA
Contextual Info: SN74FB1653 17-BIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702D – AUGUST 1997 – REVISED JUNE 2001 D D D D Compatible With IEEE Std 1194.1-1991 BTL LVTTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

Contextual Info: SN74FB1651 17ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS177O − OCTOBER 1993 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic

Contextual Info: SN74FB1651 17ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS177O − OCTOBER 1993 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic

Contextual Info: SN54FB1650, SN74FB1650 18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVERS SCBS178I - AUGUST 1992 - REVISED JUNE 1997 B-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage Compatible With IEEE Std 1194.1-1991 BTL TTL AJ>ort, Backplane Transceiver Logic

Contextual Info: SN74FB1650 18ĆBIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178O − AUGUST 1992 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

Contextual Info: SN74FB1653 17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS702H − AUGUST 1997 − REVISED MARCH 2004 D Compatible With IEEE Std 1194.1-1991 D D D D High-Impedance State During Power Up BTL LVTTL A Port, Backplane Transceiver Logic

2aO6

Abstract: 2ao4
Contextual Info: SN74FB1651 17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE SCBS177K – OCTOBER 1993 – REVISED AUGUST 1999 D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink

1A06

Abstract: 1A07 1A08 1A09 2A02 2A03 SN54FB1651 SN74FB1651
Contextual Info: SN54FB1651, SN74FB1651 17-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVERS WITH BUFFERED CLOCK LINES S C B S 1 7 7 H -O C T O B E R 1 9 9 3 -R E V IS E D O C TO B E R 1996 • Compatible With IEEE 1194.1-1991 BTL Standard • TTL A Port, Backplane Transceiver Logic