SOCKET 1150 VID PINOUT Search Results
SOCKET 1150 VID PINOUT Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
---|---|---|---|
EP11
Abstract: LVEL11 NB6L11 6l11
|
Original |
NB6L11 NB6L11 LVEL11, LVEP11 NB6L11/D EP11 LVEL11 6l11 | |
Contextual Info: NB6L11 2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator The NB6L11 is an enhanced differential 1:2 clock or data fanout buffer/translator. The device has the same pinout and is functionally equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the |
Original |
NB6L11 LVEL11, LVEP11 NB6L11/D | |
Contextual Info: NB6L11 2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator The NB6L11 is an enhanced differential 1:2 clock or data fanout buffer/translator. The device has the same pinout and is functionally equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the |
Original |
NB6L11 NB6L11 LVEL11, LVEP11 NB6L11/D | |
Contextual Info: NB7L1008 2.5V / 3.3V 1:8 LVPECL Fanout Buffer Multi−Level Inputs w/ Internal Termination http://onsemi.com Description MARKING The NB7L1008 is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008 produces eight identical output copies |
Original |
NB7L1008 NB7L1008 NB7L1008/D | |
Contextual Info: NB7L1008 2.5V / 3.3V 1:8 LVPECL Fanout Buffer Multi−Level Inputs w/ Internal Termination http://onsemi.com Description MARKING The NB7L1008 is a high performance differential 1:8 Clock/Data fanout buffer. The NB7L1008 produces eight identical output copies |
Original |
NB7L1008 NB7L1008 NB7L1008/D | |
Contextual Info: NB6L11 2.5V/3.3V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator The NB6L11 is an enhanced differential 1:2 clock or data fanout buffer/translator. The device has the same pinout and is functionally equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the |
Original |
NB6L11 LVEL11, LVEP11 NB6L11/D | |
Contextual Info: NB6L11 2.5V/3.3V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator The NB6L11 is an enhanced differential 1:2 clock or data fanout buffer/translator. The device has the same pinout and is functionally equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the |
Original |
NB6L11 NB6L11 LVEL11, LVEP11 NB6L11/D | |
EP11
Abstract: LVEL11 NB6L11 NB6L11DG NB6L11DR2G
|
Original |
NB6L11 NB6L11 LVEL11, LVEP11 NB6L11/D EP11 LVEL11 NB6L11DG NB6L11DR2G | |
EP11
Abstract: LVEL11 NB6L11 NB6L11DG
|
Original |
NB6L11 NB6L11 LVEL11, LVEP11 NB6L11/D EP11 LVEL11 NB6L11DG | |
QFN-32 footprint
Abstract: PRBS23 QFN32 Socket 1150 VID pinout
|
Original |
NB7L585R 7GHz/10Gbps NB7L585R NB7L585R/D QFN-32 footprint PRBS23 QFN32 Socket 1150 VID pinout | |
Contextual Info: NB7L585R 2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination MARKING DIAGRAM 1 Description The NB7L585R is a differential 1:6 RSECL Clock/Data distribution |
Original |
NB7L585R 7GHz/10Gbps NB7L585R NB7L585R/D | |
6l16
Abstract: LVEL16 NB6L16 NBSG16
|
Original |
NB6L16 NB6L16 LVEL16 NBSG16 NB6L16/D 6l16 | |
Contextual Info: NB6L16 2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/ Driver/Translator Buffer The NB6L16 is a high precision, low power ECL differential clock or data receiver/driver/translator buffer. The device is functionally equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With |
Original |
NB6L16 NB6L16 LVEL16 NBSG16 NB6L16/D | |
Contextual Info: NB3L14S 2.5 V 1:4 LVDS Fanout Buffer The NB3L14S is a differential 1:4 LVDS Clock fanout buffer. The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin. The NB3L14S LVDS signals will be buffered and replicated to identical LVDS copies of the Input |
Original |
NB3L14S NB3L14S NB3L14S/D | |
|
|||
LGA 1150 Socket PIN diagram
Abstract: lga1155 pinout
|
Original |
||
LGA 1155 Socket PIN diagram
Abstract: intel LGA 1155 PIN diagram LGA 1150 Socket PIN diagram socket lga 1155 pinout 1155 lga socket pins lga1155 land
|
Original |
||
Contextual Info: NB6L239 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT ÷1/2/4/8, ÷2/4/8/16 Clock Divider http://onsemi.com Description The NB6L239 is a high−speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; B1/2/4/8 |
Original |
NB6L239 B2/4/8/16. QFN-16 NB6L239/D | |
Contextual Info: NB6L239 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT ÷1/2/4/8, ÷2/4/8/16 Clock Divider The NB6L239 is a high−speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16. Both divider circuits drive a pair of differential |
Original |
NB6L239 B2/4/8/16. NB6L239/D | |
block diagram for intel core i5 processor
Abstract: LGA 1155 Socket PIN diagram intel CORE i3 instruction set
|
Original |
||
Contextual Info: NBSG16VS 2.5 V/3.3 V SiGe Differential Receiver/Driver with Variable Output Swing Description The NBSG16VS is a differential receiver/driver targeted for high frequency applications that require variable output swing. The device is functionally equivalent to the EP16VS device with much higher |
Original |
NBSG16VS NBSG16VS/D | |
405C
Abstract: 485G NB6L239 VEE60
|
Original |
NB6L239 NB6L239 B2/4/8/16. NB6L239/D 405C 485G VEE60 | |
405C
Abstract: 485G NB6L239
|
Original |
NB6L239 NB6L239 B2/4/8/16. NB6L239/D 405C 485G | |
Contextual Info: NB7L572 2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB7L572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock/Data fanout buffer. The |
Original |
NB7L572 NB7L572/D | |
Contextual Info: NB6LQ572 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator http://onsemi.com Multi−Level Inputs w/ Internal Termination The NB6LQ572 is a high performance differential 4:1 Clock/Data input multiplexer and a 1:2 LVPECL Clock / Data fanout buffer that |
Original |
NB6LQ572 NB6LQ572 NB6L572, NB6LQ572. NB6LQ572/D |