SOREP SA Search Results

Contextual Info: VL82C322 POWER MANAGEMENT UNIT V / V E R V IE W The VL82C322 Power Managment Unit PMU from VLSI Technology, Inc., dramatically reduces overall system power consumption and provides special features for laptop/notebook PC/AT -compatible computers. The power

delco ic

Abstract: Sorep SA
Contextual Info: VLSI T e c h n o l o g y , i n c . VP18322 T3PM Dual DS3 Framer/Performance Monitor FEATURES • Integrates two full-featured DS3 framer/performance monitors • Decodes a B3ZS-encoded signal and indicates line code violations • Frames to an M23 or C-bit parity

VL82c311

Abstract: VL82C48 vl82c486
Contextual Info: VL82C425 CACHE MEMORY CONTROLLER O v e r v ie w VLSI Technology, Inc.'s VL82C425 is a high-performance, highintegration, single-chip secondlevel cache memory controller for use in the design of 486-based PC/AT-compatible systems. When used with the VLSI SC486

VL82c311

Abstract: vl82c486 386DX motherboard Phoenix BIOS VL82C486 bios VL82C310 VL82C311L topcat 386dx bios Phoenix BIOS VL82C486 bios setup vl82c380
Contextual Info: VL82C380 SINGLE-CHIP 386DX PC/AT ISA CONTROLLER WITH ON-CHIP CACHE CONTROLLER O v e r v ie w VLSI Technology, Inc.’s VL82C380 is a highly integrated 32-bit single-chip PC/AT controller with on-chip cache controller designed for use in 386DX-based ISA systems operating at up to 40

z351

Abstract: SOREP Datasheet of ic 7660 "VLSI Technology Inc." 7442 pin diagram fn521 NE 7555 vlsi technology VP14374QC ANSI T1.403 CISCO
Contextual Info: fee 2 VLSI T e c h n o lo g y , in c . VP14374 QFDL QUAD FACILITY DATA LINK TRANSCEIVER FEATURES DESCRIPTION • Integrates four full-duplex HDLC data link interfaces in a single device The VP14374 QFDL Quad Facility Data Link Transceiver provides termination of

laptop MOTHERBOARD Chip Level MANUAL

Abstract: VL82c311 topcat ibm schematics 80286 80286 microprocessor schematics VL82C106 computer schematics 80286 80286 memory management motherboard laptop schematics vlsi 386sx
Contextual Info: V L S I TEC HNOLOGY INC 47E D B =1300347 GODbflEfl ^ B V T I 'TOPCAT286/386SX" PC/AT-COMPATIBLE CHIP SET The TOPCAT 286/386SX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip

91667

Contextual Info: VLSI T ec h n o lo g y , in c . ADVANCE INFORMATION VP16341 E1XC CEPT E1 TRANSCEIVER FEATURES • Integrates a full-featured C E P T E1 transceiver in a single device with analog circuitry for receiving and transmitting D S X -1 A or G .7 0 3 2048 kbits per second compatible signals

VL82C331-FC

Abstract: VL82c311 VL82C332-FC 386DX motherboard scamp VLB2C386-SET laptop MOTHERBOARD Chip Level MANUAL VL82C331FC topcat 386sX Single Board Computer
Contextual Info: O v e r v ie w The TOPCAT 386DX chip set from VLSI Technology, Inc., is a very high-integration chip set for use in the design of PC/AT -compatible based systems. This chip set is intended for use in 80386DX microprocessor-based systems with clock speeds from 16 to

Cyrix 486dx

Abstract: VL16C451
Contextual Info: SCAMP IILOW-POWER NOTEBOOK CHIP SET c in O v e r v ie w The VL82C315A SCAMP II System Controller and the VL82C322A SCAMP Power Management Unit PMU provide a high-performance, low-chip count, low-power 16-bit notebook solu­ tion. These devices support fullystatic AMD Am386™ and Cyrix

IESS-308 sCRAMBLER

Abstract: BIT 31936 scrambler satellite v.35 Viterbi Trellis Decoder texas IESS309 IESS-309 33-/BIT 31936
Contextual Info: VLSI Tech n o lo gy , in c . VP17018 RPFEC FORWARD ERROR CORRECTION CIRCUIT FEATURES • Optional selection of differential encoding/decoding insertion for operation at code rates up to 7/8 • Integrates a full-featured convo­ lutional encoder and a Viterbi

R/CHN 041 diode

Contextual Info: V L S I Te c h n o l o g y in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES ^ s • Advanced f.O microij/idrawn silicon gate'technutbgy • Seven array sizes from 30,300 to 246,500 available gates • Continuous Gate architecture for maximum layout efficiency

BIT 31936

Abstract: Luscombe Engineering
Contextual Info: VLSI T ec h n o lo g y , in c . VP14374 QFDL QUAD FACILITY DATA LINK TRANSCEIVER FEATURES DESCRIPTION • Integrates four full-duplex HDLC data link interfaces in a single device The VP14374 QFDL Quad Facility Data Link Transceiver provides termination of

TR-TSY-000312

Abstract: Delco tt 2222 Datasheet sorep Nippon capacitors Electra s.r.l. vlsi technology VP14312QC vlsi tech
Contextual Info: -ì ? yH f i p VLSI T ec h n o lo g y , in c . ADVANCE INFORMATION VP14312 DDSX DUAL DSX-1 LINE INTERFACE UNIT FEATURES • Generates and detects programmable in-band loopback code sequences in both framed and unframed DS-1 streams • Integrates two duplex DSX-1

VLSI Technology

Abstract: kt 714 schematic transistor modul trigger pt6005 vlsi design physical verification VGT300 "VLSI Technology Inc." PT6055 GAH 521 fabrimex
Contextual Info: V L S I T ec h n o lo g y , in c . VGT300 SERIES 1.0-MICRON GATE ARRAY SERIES FEATURES s • Advanced f.O microp/fdrawn silicon gate'techrrology • Seven array sizes from 30,300 to 246,500 available gates • Continuous Gate architecture for maximum layout efficiency

Contextual Info: VT6288H L • VT6289H(L) ADVANCE INFORMATION VT6290H • VT6291H V L S I T e c h n o lo g y inc. 1 6 ,3 8 4 x 4 S R A M FEATURES • High-speed access and cycle times: 15, 20, 25, and 35 ns • 24-lead, 300 mil SOJ package (VT6288H/88HL, VT6289H/89HL, VT6290H, VT6291H)

circuit diagram for speed control for highways

Abstract: VF-8X tt 3043 transistor tt 2222 vlsi technology LA 7555 SERIAL, strobe,clock INPUT PARALLEL sj 3159 TT 2222 VL7C116-QC
Contextual Info: l'i.XÄ 2 6 ÎÎK1 VLSI T ech no lo gy , in c . PRELIMINARY VL7C116 DIGITAL SWITCH MEMORY INTERFACE DSMI FEATURES • Allows easy implementation of digital PCM (Pulse Code Modulation) time slot switch capable of routing any 8-bit time slot of any of the 16 Incoming PCM highways

pcm slot

Abstract: ta 8375
Contextual Info: VLSI Tech no lo gy , in c . PRELIMINARY VL7C116 DIGITAL SWITCH MEMORY INTERFACE DSMI FEATURES • Allows easy implementation of digital PCM (Pulse Code Modulation) time slot switch • Control lines readily permit operation for non-PCM applications capable of routing any 8-bit tim e slot of

Contextual Info: VLSI T ec h n o lo g y , in c . VP14322 DXPM DUAL DSX-1 PERFORMANCE MONITOR FEATURES • Integrates tw o full-featured T 1 performance monitors in a single device • Provides an HDLC interface for terminating the ESF or ZBTSI data link • Recovers clock and data and

traco tme

Abstract: VT7132A keyes
Contextual Info: V L S I Technology , in g PRELIMINARY FUNCTIONAL DESCRIPTION The V T 713 2A and V T 7142A are 16,384-bit d ual-po rt R A M s that feature tw o separate ports. Each allow s in dependent a ccess for reading or w riting to any location in the m em ory. PORT ENABLING

TEK 461

Abstract: SK TME 86 i on VM009-B 2272 m4 "vlsi technology" VM009 book cook
Contextual Info: MW 4 Mi V L S I Tech no lo gy , in c . VM009 HIGH-SPEED DES DEVICE FEATURES • Supports three ciphering operations: - Electronic Codebook ECB - Cipher Block Chaining (CBC) - Cipher Feedback (CFB) • Three data ports - Master Port - Slave Port - Auxiliary Port

Contextual Info: m VLSI T ec h n o lo g y in c . ADVANCE INFORMATION VP14335/14574 T1/E1 Line Interface Unit FEATURES APPLICATIONS DESCRIPTION • Analog PCM line interface for T 1 and E1 PCM-30 applications • Clock recovery functions using a 6.176 MHz Crystal Oscillator

VL16C450

Abstract: VL16C550 Delco 195 sorep s3607 MSR 200 VL16C550PC
Contextual Info: VLSI Tech no lo gy , in c . VL16C550 ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs FEATURES DESCRIPTION • Fully compatible with VL16C450 ACE The VL16C550 is an asynchronous communications element ACE that is functionally equivalent to the VL16C450, and additionally incorpo­

vl16c552

Abstract: lpt port direction bit 5
Contextual Info: VLSI Tech n o lo gy , in c . VL16C552 DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFO FEATURES • Three-state TTL drive for the data and control bus on each channel • IBM PC/AT -compatible • Two VL16C550 ACEs • Hardware and software compatible with VL16C452 and VL16C452B

vl82c486

Abstract: Phoenix BIOS VL82C486 bios Phoenix BIOS VL82C486 bios setup KB 7780 the-VL82C486 VL82C48 65ZD tag 8622 TAG7_ equivalent TAG3_ equivalent
Contextual Info: i-1* 3 i TO VLSI T ech n o lo g y , in c. ADVANCE INFORMATION VL82C425 486 CACHE CONTROLLER FEATURES • Single chip second-level cache control­ ler optimized for use with the VL82C486 System Controller • Look-aside architecture allows cache to be board-level option