SP ANSION FL Search Results

IR3N06

Abstract: IR3N37 IR3N06N LR4087 LR4809 IR3N34 LR48106
Contextual Info: SPECIAL FUNCTION ICs ICa for Telecommunications • Tone Dialers Kay Input MMMNo. Ton* output MUttotiÇut 00 LR4087B/BN Single contact Complementary ■m Á ^ ¿ X 7 7 Q M nM M managr :«inri»*> flwAiTVP. iaJttTVft 2.5 to 6 Bipolar NPN LR4089B/BN Matrix

sp ansion fl

Contextual Info: 512/1K/2K/4K x 9-bit First-In/First-Out FIFO with Flags + OE L8C2011/2021 L8C2031/2041 DESCRIPTION FEATURES □ First-In /First O u t (F IF O ) using D ual-Port M e m o ry The L8C2011, L8C2021, L8C2031, and p arallel. The a ctive d evice is d eter­ L8C2041 are dual-port First-In/First-

Contextual Info: CEMENT TYPE RESISTO RS ¿Pj T Wirewound & Metal Oxide Film SQ P - r •1 -o- H I A’L rw - — 35±3- Max Working Resistance Rang« ( n ) Dimension (mm) Typ« L±1.5 d±0.O5 VoHoga MOF+SOP SQP SOP W ±1 H±1 2W 3W 6W 7W tow 1SW 7 8 10 10 10 12.6 7 B 9 9

BGY2016

Abstract: FERROXCUBE 4330 UBL z2 heatsink catalogue PHILIPS 4330 030 36300
Contextual Info: Philips Sem iconductors Product specification UHF amplifier module BGY2016 PINNING - SOT365A FE A T U R E S • 26 V nom inal su p p ly voltage PIN • 16 W output pow er into a load of 50 £2 with an R F drive pow er of <20 mW. APPLICATIONS DESCRIPTION 1

Contextual Info: MOTOROLA MC10164 8-LINE MULTIPLEXER T h e M C 1 0 1 6 4 is a high sp eed, lo w p o w e r eig h t-c h an n el data selector w h ic h ro utes d a ta p rese nt at o n e -o f-eig h t inputs to the output. T h e d ata is ro u ted according to th e th re e bit cod e present

Contextual Info: * SY10422-2.5/3/4/5/7 SY100422-2.5/3/4/5/7 SY101422-2.5/3/4/5/7 255 x 4 ECL RAM SYNERGY S E M IC O N D U C TO R DESCRIPTION FEATURES • Address access time, tAA: 2.5/3/4/5/7ns max. ■ Block select access time, tAB: 2ns max. ■ Write pulse width, tww: 3ns min.

Contextual Info: IN T E G R A T E D DEVICE, böE D MÛ 25 77 1 G D 1 3 77 Ö b2D CMOS SyncFlFO 64X9, 256x9, 512x9, 1024 X 9, 2048 X 9 and 4096 x 9 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • • • • • • 64 x 9-bit organization IDT72421

Contextual Info: CY7C429A CY7C433A PRELIMINARY Features High-Speed Cascadable 2K X 9 FIFO 4K X 9 FIFO • TTL compatible • Three-state outputs • 2 ,0 4 8 x 9 and 4,096 x 9 FIFO buffer memory • Pin compatible and functional equivalent to IDT7203 and IDT7204 • Dual-port RAM cell

PF324-01

Abstract: SRM2275H35 SRM2275H45 SRM2275H55 NS LODA loda
Contextual Info: PF324-01 SRM2275H 35/45/55 _ HIGH SPEED CMOS 64K-BIT STATIC RAM ' # L o w Supply Current ^Access Time 35n s/45n s/55n s ^ # 1 6 ,3 8 4 Words X 4 Bits Asynchronous •DESC R IPTIO N T h e SRM2275H35/45/55 is a 16,384 w ords x 4 bit asynchronous, s ta tic, random a cce ss m em ory fa b rica te d on

Contextual Info: PRELIMINARY |U|IC=RON 1 MEG X MT8LS1 32 32 SRAM M O D U LE 1 MEG X 32 SRAM SRAM MODULE 3.3V WITH OUTPUT ENABLE FEATURES • • • • • • OPTIONS 72-Pin SIMM SE-4 72-Pin ZIP (SG-4) MARKING • T im in g 15ns access 20n s access 25n s access 35n s access

7404 not gate

Abstract: CI 7404 7404 gate 7404 7404 ls functional DIAGRAM 7404 hct 347 ls 7404 74HC 74HCT
Contextual Info: NAP C/PHILIPS « « C O N » UE , . t b s 3 ,24 m t 1 M H m ziQ 3 P ro d u c t s p e c ific a tio n « B iW M W B — l P h ilip s S e m ic o n d u c to rs 74HC/HCT7404 5-Bit x 64-word FIFO register; 3-state FE A T U R E S im Q U IC K R E F E R E N C E D A TA

82S191

Abstract: 82s191i 82S190 82S191-I 82s141 82S140 SIGNETICS* fusing procedure
Contextual Info: 82S190-I • 82S191-I PIN CONFIGURATION Prototyping/volume production Sequential controllers Microprogramming Hardwired algorithms Control store Random logic Code conversion 1 P AC K A G E * I3vcc IH ID HU. 13 H] ÜH Ho. Ulo, Mo, Ulo, jllo. A ,E *,Œ A. A,

mosfet W03

Abstract: FDS6690A
Contextual Info: F/MRCHII-D S E M IC O N D U C T O R April 1999 t FDS6690A Single N-Channel, Logic Level, PowerTrench MOSFET General Description Features This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's advanced PowerTrench process that has been

Signetics 82S191

Contextual Info: APPLICATIONS • • • • • • • PIN CONFIGURATION Prototyping/volume production Sequential controllers Microprogramming Hardwired algorithms Control store Random logic Code conversion I PACKAGE* A, a A. H A [I [I ,E A „ E 0,E cÆ o,ni g n o ’ I =

SI-S42

Abstract: so54 power S4192 Js432 D83 I
Contextual Info: Products Type pw BW9;‘68K INTEGRATED CIRCUIT STRUCTURE Silicon Monolithic Integrated Circuit TYPE Man-Machine Intyfrra LCD Driver Th C prOd+~Cr described i n t h i s SDecification is d e s i g n e d to be u>ed wi:h ordinary eiec!roiic equismezt or bences such 2s audio-viscal eqcip,Tent, c!!ice-~:~~&c;l

Contextual Info: t— « CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Integrated Device Technology, Inc. IDT72401 IDT72402 IDT72403 IDT72404 Ol ru ru FEATURES: O utput E nable OE pin. T h e FIFO s a cce p t 4-b it or 5-bit data at th e data input (D o- d 3, 4). T h e stored data s ta ck up on a f irstin/first-ou t basis.

82S114

Abstract: 82S115
Contextual Info: 82S114-F.N • 82S115-F.N DESCRIPTION The 82S114 and 82S115 are fie ld p ro g ra m ­ m able and in clu d e o n -c h ip d e c o d in g and 2 c h ip enable inpu ts fo r ease of m e m ory ex­ pansion. They feature tri-s ta te o u tp u ts fo r o p tim iza tio n of w ord exp ansion in bused

Contextual Info: SY10422-2.5/3/4/5/7 SY100422-2.5/3/4/5/7 SY101422-2.5/3/4/5/7 256 x 4 ECL RAM SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES • Address access time, tAA: 2.5/3/4/5/7ns max. T h e S yn e rg y S Y 1 0 /1 0 0 /1 0 1 4 2 2 are 1 0 24-b it R andom A ccess M e m orie s R A M s , d e s ig n e d w ith ad va n ce d E m itter

Contextual Info: PRELIMINARY |u iic : r o n 32K MT58LC32K32/36B3 32/36 SYNCBURST SRAM X +3.3V SUPPLY, FLOW-THROUGH AND SELECTABLE BURST MODE FEATURES • • • • • • • • • • • • • • PIN ASSIGNMENT Top View Fast access tim es: 8.5, 9, 1 0 ,1 1 and 12ns

F7220

Abstract: IDT72231L35 IDT72201 IDT72211 IDT72221 IDT72231 IDT72241 IDT72420 IDT72421
Contextual Info: CMOS PARALLEL SyncFlFO CLOCKED FIFO 64 X 9-BIT, 256 X 9-BIT, 512 x 9-BIT, 1024 X 9-BIT, 2048 X 9-BIT & 4096 X 9-BIT FEATURES: • • • • • • • • • • • • 64 x 9-bit organization (ID T 72421) 2 5 6 x 9-bit organiza tion (ID T72201)

Contextual Info: Features • M ultiple p ack ag in g o p tion s • O rg an izatio n : 2 6 2 , 1 4 4 w o rd s x 3 2 o r 3 6 bits • Fast clo ck sp eeds to 1 6 6 M H z in LVTTL/LVCM OS - E co n o m ical 1 0 0 -p in TQ FP package • Fast clo ck to data access: 3 . 5 / 3 . 8 / 4 / 5 ns

Contextual Info: FUJITSU GENERAL PURPOSE DIGITAL SIGNAL PROCESSOR December 1985 Edition 2.0 G ENERAL PURPOSE D IG IT A L SIGNAL PROCESSOR The F u jitsu MB 8 764 is a general purpose silicon-gate CMOS d ig ita l signal processor DSP integrated c irc u it. The MB 8 76 4 features a high-speed

Contextual Info: M O TO R O LA SEMICONDUCTOR TECHNICAL DATA Order this docum ent by MCM69P618A/D MCM69P618A Product Preview 64K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM69P618A is a 1M bit synchronous fast static RAM designed to pro­ vide a burstable, high performance, secondary cache for the 68K Family, Pow­

5xxN

Abstract: 72125
Contextual Info: CMOS PARALLEL-TO-SERIAL FIFO 2 56x 16 , 51 2x16, 10 24x16 IDT72105 IDT72115 IDT72125 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • • • F o ur m e m o ry s ta tu s fla g s: E m pty, Full, H alf-F ull, and A lm o s t-E m p ty /A lm o s t-F u ll