AN-300
Abstract: FM25040 FM25160
Text: AN-300 SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the
|
Original
|
PDF
|
AN-300
FM25160
FM25040
16-bit
AN-300
|
EDGE22
Abstract: FM25040 FM25160
Text: Application Note SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the
|
Original
|
PDF
|
FM25160
FM25040
16-bit
EDGE22
|
DATASHEET OF SPI protocol
Abstract: FM25040 FM25160
Text: Application Note SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the
|
Original
|
PDF
|
FM25160
FM25040
16-bit
DATASHEET OF SPI protocol
|
JTAG MODULE SPI
Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Text: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
PDF
|
BH820-1)
88P8341
drw38
JTAG MODULE SPI
spi flash parallel port
TSOP 28 SPI memory Package flash
88P8341
|
IDT88P8344
Abstract: 88P8344
Text: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
PDF
|
BH820-1)
88P8344
IDT88P8344
88P8344
|
TSOP 48 thermal resistance type1
Abstract: IDT88P8342 drw22
Text: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
|
Original
|
PDF
|
BH820-1)
88P8342
TSOP 48 thermal resistance type1
IDT88P8342
drw22
|
Tresos
Abstract: UM0565 SPI105 automotive ecu manual SPC563M SPI156 SPI DRIVER autosar autosar can driver
Text: UM0565 User manual SPC563M SPI driver Introduction This user manual describes the AUTOSAR serial peripheral interface SPI driver. AUTOSAR SPI driver configuration parameters and deviations from the specification are described in SPI driver chapter. AUTOSAR SPI driver requirements and APIs are described
|
Original
|
PDF
|
UM0565
SPC563M
Tresos
UM0565
SPI105
automotive ecu manual
SPI156
SPI DRIVER
autosar
autosar can driver
|
SC18IM700
Abstract: RS-232 to i2c converter sc18is602ipw I2C master controller uart i2c to RS-232 converter LCD 16PIN 4 SC18IS600 SC18IS600IPW SC18IS601 SC18IS602
Text: NXP I2C/SPI master bridges SC18IS600/601, SC18IS602/603, and SC18IM700 Connect I2C/SPI slave or UART to I2C/SPI master or GPIO These compact protocol converters create seamless, low-power, low-voltage interface connections, so they make it quick and easy to add I2C/SPI master and GPIO capability to
|
Original
|
PDF
|
SC18IS600/601,
SC18IS602/603,
SC18IM700
SC18IS600/601
SC18IM700
RS-232 to i2c converter
sc18is602ipw
I2C master controller uart
i2c to RS-232 converter
LCD 16PIN 4
SC18IS600
SC18IS600IPW
SC18IS601
SC18IS602
|
Untitled
Abstract: No abstract text available
Text: ispLever CORE TM Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide October 2005 ipug29_02.0 Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide Lattice Semiconductor Introduction Lattice’s Quad SPI-3 System Packet Interface Level 3 to SPI-4 (System Packet Interface Level 4) Bridge is an IP
|
Original
|
PDF
|
ipug29
BS-2FE1036C.
SPI-324L-O4-N1.
|
M95512 diagram
Abstract: M95512-DR M95512-W M95512 M95512-R
Text: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit
|
Original
|
PDF
|
M95512-DR
M95512-R
M95512-W
M95512-W
M95512-R:
M95512-DR:
M95512 diagram
M95512-DR
M95512
|
Untitled
Abstract: No abstract text available
Text: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit
|
Original
|
PDF
|
M95512-DR
M95512-R
M95512-W
M95512-W
M95512-R:
M95512-DR:
|
M95512
Abstract: M95512-DR M95512-R M95512-W
Text: M95512-DR M95512-R M95512-W 512 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface Positive clock SPI modes : – M95512-W and M95512-R: standard SPI 512 Kbit EEPROM – M95512-DR: standard SPI 512 Kbit
|
Original
|
PDF
|
M95512-DR
M95512-R
M95512-W
M95512-W
M95512-R:
M95512-DR:
M95512
M95512-DR
|
EEPROM ST M95256
Abstract: M95256-DR
Text: M95256-DR M95256 M95256-W M95256-R 256 Kbit serial SPI bus EEPROM with high-speed clock Features • Compatible with SPI bus serial interface positive clock SPI modes : – M95256, M95256-W and M95256-R: standard SPI 256 Kbit EEPROM – M95256-DR: standard SPI 256 Kbit
|
Original
|
PDF
|
M95256-DR
M95256
M95256-W
M95256-R
M95256,
M95256-R:
M95256-DR:
M95256
M95256-W
EEPROM ST M95256
|
Untitled
Abstract: No abstract text available
Text: RS232 & USB to SPI RS232/USB-SPI-N Bi-Directional Converter: RS232<->SPI or USB<->SPI The Big Deal • Allows Bi-Directional communication between USB or RS232 to SPI • Easy-to-use, quick-loading GUI and API objects for programmers - compatible with 32/64 Bit operating systems
|
Original
|
PDF
|
RS232
RS232/USB-SPI-N
RS232
LK1579
RS232/USB-SPI-N
330kbit/sec
|
|
|
0123F POWER SUPPLY
Abstract: 0880E 0830B mcu 08300 0080D 0847f fcbg AA23 AC25 IDT7172604
Text: IDT88K8483 SPI-4 Exchange Document Issue 1.0 Description Features Functionality – Multiplexes logical ports LPs from SPI-4A and SPI-4B to SPI4M – Optionally converts between interleaved packet transfers and whole packet transfers per logical port – Data redirection per LP between SPI-4A, SPI-4B and 10G
|
Original
|
PDF
|
IDT88K8483
IDT88K8483BRI
IDT88K8483
IDT88K8483BLI
IDT88K8484
0123F POWER SUPPLY
0880E
0830B
mcu 08300
0080D
0847f
fcbg
AA23
AC25
IDT7172604
|
NII51011-7
Abstract: No abstract text available
Text: 9. SPI Core NII51011-7.1.0 Core Overview SPI is an industry-standard serial protocol commonly used in embedded systems to connect microprocessors to a variety of off-chip sensor, conversion, memory, and control devices. The SPI core with Avalon interface implements the SPI protocol and provides an Avalon MemoryMapped Avalon-MM interface on the back end.
|
Original
|
PDF
|
NII51011-7
24-bit
|
VA800A-SPI
Abstract: VM800B VM800C
Text: Datasheet USB 2.0 HI-SPEED TO SPI MPSSE MODULE Version 1.0 Document Reference No.: FT_000882 Clearance No.: FTDI #354 FTDI Chip VA800A-SPI USB 2.0 Hi-Speed to MPSSE SPI Module 1. Introduction 1.1 Features • The USB2.0 Hi-Speed to MPSSE SPI Module, VA800A-SPI, is a small electronic circuit board,
|
Original
|
PDF
|
VA800A-SPI
VA800A-SPI,
FT232H.
VM800B
VM800C
FT800
480Mbits/Second)
12Mbits/Second)
VA800A-SPI
|
TSX 07 software
Abstract: DPRAM Quad SPI MPC860 ORSPI4-2FE1036C SPI-324P-O4-N1 OIF-SPI4-02
Text: Quad SPI-3 to SPI-4 PHY Layer Bridge Core April 2004 IP Data Sheet Features – Configurable through the MicroProcessor Interface MPI ORCA 4 System Bus – Programmable parity type on SPI-3 bus • Complete Quad SPI-3 to SPI-4 PHY Layer Bridge Solution Based on the ORCA
|
Original
|
PDF
|
OIF-SPI3-01
ORSPI4-2FE1036C
SPI-324P-O4-N1.
TSX 07 software
DPRAM
Quad SPI
MPC860
SPI-324P-O4-N1
OIF-SPI4-02
|
sck 082
Abstract: AN802 APP802 MAX5154 MAX7651 MAX7652 CAN protocol basics mosi CS 8-02
Text: Maxim > App Notes > A/D and D/A CONVERSION/SAMPLING CIRCUITS INTERFACE CIRCUITS Keywords: SPI, SPI interface, SCK, MOSI, MISO, CS, I/O ports, bit banging, SPI peripheral. Sep 17, 2001 APPLICATION NOTE 802 Interfacing SPI Peripherals to the MAX7651 Processor
|
Original
|
PDF
|
MAX7651
MAX7651,
12-bit
125KHz)
MAX7651
12MHz
com/an802
MAX5154:
MAX7651:
sck 082
AN802
APP802
MAX5154
MAX7652
CAN protocol basics
mosi
CS 8-02
|
MAX730
Abstract: 74HC125 SN74AHC1G125 MAX7317 daisy-chained MAX7301 M68HC11 MAX4595 MAX6852 MAX6950 MAX6952
Text: Maxim > App Notes > AUTOMOTIVE DISPLAY DRIVERS Keywords: SPI, serial interface, display drivers, 3-wire, tri-state, daisy-chain, cascade, QSPI, LED drivers, GPIO, I/O expanders, SPI devices Feb 10, 2003 APPLICATION NOTE 1879 Using Maxim SPI-compatible Display Drivers with other SPI
|
Original
|
PDF
|
MAX6950,
MAX6951,
MAX6952,
MAX6954,
MAX6957,
MAX7221
MAX6850,
MAX6852
MAX6950:
MAX6951:
MAX730
74HC125
SN74AHC1G125
MAX7317 daisy-chained
MAX7301
M68HC11
MAX4595
MAX6950
MAX6952
|
ISL224x4
Abstract: Master sequence device AN1340 ISL22424 SPI protocol
Text: SPI Protocol and Bus Configuration of Multiple DCPs Application Note The Serial Peripheral Interface SPI is one of the widely accepted communication interfaces implemented in Intersil’s Digitally Controlled Potentiometers (DCP) portfolio. Developed by Motorola, the SPI protocol became a standard
|
Original
|
PDF
|
AN1340
ISL224x4
Master sequence device
ISL22424
SPI protocol
|
xc6vlx130t-ff1156
Abstract: XILINX ipic axi
Text: LogiCORE IP AXI Serial Peripheral Interface AXI SPI (v1.02.a) DS742 January 18, 2012 Product Specification Introduction LogiCORE IP Facts The AXI Serial Peripheral Interface (SPI) connects to the Advanced eXtensible Interface (AXI4). This core provides a serial interface to SPI devices such as SPI
|
Original
|
PDF
|
DS742
M68HC11
32-bit
xc6vlx130t-ff1156
XILINX ipic axi
|
AC324
Abstract: I2C Peripherals Serial communication I2C in AGLP125V2-CS289 Actel igloo
Text: Application Note AC324 SPI-to-I2C Interface Design Example Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C and SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
|
Original
|
PDF
|
AC324
AC324
I2C Peripherals
Serial communication I2C in
AGLP125V2-CS289
Actel igloo
|
25LC160
Abstract: DS464 M68HC11 MPC8260 M68HC11 reference manual ml300 ucf
Text: OPB Serial Peripheral Interface SPI (v1.00e) DS464 July 21, 2006 Product Specification 0 0 Introduction LogiCORE Facts The Xilinx OPB Serial Peripheral Interface (SPI) connects to the OPB and provides the controller interface to any SPI device such as SPI EEPROMs. It is
|
Original
|
PDF
|
DS464
M68HC11
M68HC11-Rev.
MPC8260
25LC160
M68HC11 reference manual
ml300 ucf
|
