SPRU806 Search Results

AL-N11

Abstract: C6000 SPRU189 SPRU190 TMS320C6000 ALN11 sys10 ALN10
Contextual Info: TMS320TCI648x DSP Software-Programmable Phase-Locked Loop PLL Controller User's Guide Literature Number: SPRU806 December 2005 2 SPRU806 – December 2005 Contents Preface . 5

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: TMS320TCI6482 www.ti.com SPRS246K – APRIL 2005 – REVISED MARCH 2012 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

CSR BC5

Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

CDMA system implementation

Contextual Info: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246E – APRIL 2005 – REVISED DECEMBER 2006 1 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 Features • • • • • • • • High-Performance Fixed-Point DSP TCI6482

RS 8223

Abstract: CDMA system implementation
Contextual Info: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246E – APRIL 2005 – REVISED DECEMBER 2006 1 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 Features • • • • • • • • High-Performance Fixed-Point DSP TCI6482

SCR RC10

Abstract: tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808
Contextual Info: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

SPRM316

Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
Contextual Info: TMS320TCI6486 www.ti.com SPRS300I – FEBRUARY 2006 – REVISED OCTOBER 2009 TMS320TCI6486 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6486 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian

Contextual Info: TMS320TCI6482 SPRS246J – APRIL 2005 – REVISED JULY 2011 www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time

TNETV3020

Abstract: RGMII V1.3 SPRA839 1.5V RGMII SPRS300 SPRM316 MDIO controller TMS320TCI6486 SPRU811 SPRS612
Contextual Info: Application Report SPRAAQ4B – January 2008 – Revised October 2009 TMS320C6472/TMS320TCI6486 Hardware Design Guide Thomas Johnson . Digital Signal Processing Solutions ABSTRACT

MDIO controller

Abstract: C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

Contextual Info: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

viterbi algorithm

Contextual Info: TMS320TCI6482 Communications Infrastructure Digital Signal Processor www.ti.com SPRS246G – APRIL 2005 – REVISED APRIL 2009 1 Features • • • • • • • • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time

CSR 8811

Abstract: 8821P TMS320TCI6484
Contextual Info: TMS320TCI6484 Communications Infrastructure Digital Signal Processor Data Manual Literature Number: SPRS438E October 2009 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

Transistor tip 126m

Abstract: TMS320TCI6484 TMS320C6457 DSP Ethernet Media Access Controller baseband MAC IC D100 scr a118 TA 8264 analog Rake search accelerator TMS320TCI6487 5h a200 transistor microprocessor ic 501b
Contextual Info: TMS320TCI6484 Communications Infrastructure Digital Signal Processor Data Manual Literature Number: SPRS438E October 2009 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

rake complex

Abstract: CDMA system implementation
Contextual Info: TMS320TCI6482 www.ti.com SPRS246K – APRIL 2005 – REVISED MARCH 2012 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Gigabit Ethernet MAC SPI

Abstract: R065 51L2 cdma design implementation
Contextual Info: www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor SPRS246C – APRIL 2005 – REVISED MARCH 2006 TMS320TCI6482 Communications Infrastructure Digital Signal Processor 1.1 • • • • • • • • Features High-Performance Fixed-Point DSP TCI6482

112Bf

Abstract: SPRA387 0260F
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

BC5 CSR

Abstract: S128128
Contextual Info: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 1.1 www.ti.com CTZ/ZTZ BGA Package Bottom View The TMS320C6472 devices are designed for a package temperature range of 0°C to 85°C (commercial temperature range) or -40°C to 100°C (extended temperature range).

TMS320TCI6484

Contextual Info: TMS320TCI6484 Communications Infrastructure Digital Signal Processor Data Manual Literature Number: SPRS438E October 2009 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

C6000

Abstract: DDR2-533 TMS320C6000 CSR BC5 LOG TX2 1108 rx2freebuffer rgmii specification tnetv Y10-Y12 002BFF
Contextual Info: TMS320C6472 www.ti.com SPRS612F – JUNE 2009 – REVISED FEBRUARY 2011 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller