SRAM Search Results

Contextual Info: TOSHIBA TC55V2325FF-100 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 65,536 W O R D x 32 BIT Synchronous Pipelined Burst SRAM DESCRIPTION The TC55V2325FF is a 2 ,0 9 7 ,1 5 2 bit synchronous pipelined burst SRAM that is organized as 65,536 words by 32 bits and designed for use in a secondary cache to support MPUs which have burst

th50vsf1400

Abstract: BA30
Contextual Info: TOSHIBA TH 50VSF1400/1401ACXB TENTATIVE TOSHIBA MULTI CHIP INTEGRATED CIRCUIT SILICON GATE CMOS SRAM A N D FLASH M E M O R Y M IX E D M U LTI-C H IP PACKAGE DESCRIPTION The TH50VSF1400/1401ACXB is a mixed containing a package 2,097,152-bit SRAM and a 16,777,216-bit flash memory. The SRAM is organized as 262,144 words by 8 bits and the flash memory

UM62*512

Contextual Info: UM62L512 Series 6 4 K X 8 LOW VOLTAGE CMOS SRAM PRELIMINARY Features • Single + 3.3V power supply ■ Access times: 70/100 ns max. * Current: Low power version: Operating: 40mA ■ Directly TTL compatible: All inputs and outputs ■ Comm on I/O using three-state output

Contextual Info: o bq4850Y U N I T R O D E - RTC Module with 512Kx8 SRAM Features General Description >• I n te g r a t e d SRAM, re a l-tim e clock, crystal, power-fail control circuit, and battery The bq4850Y RTC Module is a non­ volatile 4,194,304-bit SRAM organ­

UM61256FK-15

Abstract: um61256fs 15 UM61256FS-15 um61256f um61256fk15 UM61256FK UM61256FM-25 um61256 UM61256FK-12 um61256fs
Contextual Info: UM61256F Seríes 32K X a High Speed CMOS SRAM Features • * ■ ■ ■ Single +5V power supply ■ Access times: 12 /15/2 5 ns max. ■ Current: Operating: 150mA (max.) Standby: 12mA (max.) ■ Full static operation, no clock o r refreshing required Directly TTL compatible: All inputs and outputs

um611864

Contextual Info: a S amar a a P R E L IM IN A R Y - UM611864 64K X 18 Bit Synchronous High Speed CMOS SRAM Features Single +5V power supply Fast access times: 9/11 ns Current: Operating: 275mA Standby: 95mA Synchronous self-timed write Individual byte write control Asynchronous output enable

UM614256

Abstract: HC 3102
Contextual Info: UM614256 Seríes 2 5 6 K X 4 , 3.3V I/O High Speed CMOS SRAM Features • Single +5V power supply 3.3V I/O compatible All inputs and outputs directly TTL com patible Comm on I/O using three-state output Data retention voltage: 3V min. Available in 28-pin SOJ package

LQFP-100

Contextual Info: TOSHIBA TC55WD1618FF-133,-150,-167 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TENTATIVE SILICON GATE CMOS 1,048,576-WORD BY 18-BIT SYNCHRONOUS NO-TURNAROUND STATIC RAM DESCRIPTION The TC55WD1618FF is a synchronous static random access memory SRAM organized as 1,048,576 words by

UM6114

Abstract: SRAM 6114 UM 6114 611-4
Contextual Info: 1IM Fi 7 =r : UM 6114 ^ IK X 4 CM OS SRAM Features • S in g le +5 v o lt p o w er su p p ly D ir e c t ly T T L co m p a tib le : A ll in p u ts and o u tp u ts ■ A c ce ss tim e : 9 0 ns m a x . C o m m o n I/O using three-state o u tp u t D ata re te n tio n vo ltag e: 2 V (m in .)

UM621024B

Abstract: UM621024 um621024bm-70l
Contextual Info: UM621024B Seríes 128K X 8 CMOS SRAM Features • Single +5V power supply ■ Access times: 55/70 ns max. ■ Current: Low power version: Operating: 70mA Standby: 100(iA Very low power version: Operating: 70mA Standby: 25 (¿A * Full static operation, no clock or refreshing

Contextual Info: o U N IT R O D E _ bq2201 SRAM Nonvolatile Controller Unit Features General Description >• Power monitoring and switching for 3-volt battery-backup applica­ tions The CMOS bq2201 SRAM Nonvolatile Controller Unit provides all necessary functions for converting a standard

UM61M512K-15

Abstract: UM61M512K15 UM61M512 um61M512K UM61M512-20 um61m UM61M51
Contextual Info: UM61M512 Seríes 64KX 8, 3.3V I/O High Speed CMOS SRAM Features • Single +5V power supply * Access times: 15/20 ns max. ■ Current: Operating: 160mA (max.) Standby. 10mA (max.) ■ Full static operation, no clock or refreshing required ■ 3.3V I/O com patible

Contextual Info: OJ bq4014/bq4014Y UNITRODE- 256Kx8 Nonvolatile SRAM Features > Data retention in the absence of power > Automatic write-protection dur­ ing power-up/power-down cycles >• Industry-standard 32-pin 256K x 8 pinout >• Conventional SEAM operation; unlimited write cycles

TC551001BPL-10

Abstract: TC551001BPL-7
Contextual Info: INTEGRATED TO SHIBA TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TECHNICAL TC551001 BPL / BFL / BFTL / BTRL - 70 TC551001 BPL / BFL / BFTL / BTRL - 85 TC551001 BPL/ BFL/ BFTL/ BTRL-10 DATA SILICON GATE CMOS 131,072-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC551001BPL/BFL/BFTL/BTRL is a 1,048,576-bit static random access memory SRAM organized as

UM61L3232AF-7

Abstract: UM61L3232A um61 UM61L UM61L3232 UM61L3232AF-8 UM61-l-3232af
Contextual Info: UM61L3232A Series PRELIMINARY 32K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output Features Fast access times: 5/6/7/8 ns Single +3.3V+10% or +3.3V-5% power supply Synchronous burst function Individual Byte W rite control and Global Write

alarm clock IC

Abstract: bq4842y
Contextual Info: bq4842Y RTC Module with 128Kx8 SRAM Features General Description >• I n te g r a t e d SRAM, re a l-tim e clock, CPU supervisor, crystal, pow er-fail control circuit, and battery The bq4842Y RTC Module is a non­ volatile 1,048,576-bit SRAM organ­ ized as 131,072 words by 8 bits with

Contextual Info: bq4011/bq4011Y 32Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4011 is a nonvolatile 262,144-bit static RAM organized as 32,768 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

UNITRODE

Contextual Info: bq4014/bq4014Y 256Kx8 Nonvolatile SRAM Features ➤ Data retention in the absence of power ➤ Automatic write-protection during power-up/power-down cycles ➤ Industry-standard 32-pin 256K x 8 pinout ➤ Conventional SRAM operation; unlimited write cycles

lpc1769

Abstract: ARM LPC1769 instruction set LPC1768 bootloader lpc1768 gpio lpc1768fbd LPC236 LPC17XX LPC1766 NXP bootloader LPC1768 spi Crystal oscillator 12 MHz
Contextual Info: LPC1769/68/67/66/65/64/63 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 9 — 10 August 2012 Product data sheet 1. General description The LPC1769/68/67/66/65/64/63 are ARM Cortex-M3 based microcontrollers for

Contextual Info: bq4011/bq4011Y 32Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4011 is a nonvolatile 262,144-bit static RAM organized as 32,768 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

TEXAS INSTRUMENTS, Mold Compound, CSP

Contextual Info: SM320C6202ĆEP FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SGUS044–JULY 2003 D Controlled Baseline D D D D D D D D D D 3M-Bit On-Chip SRAM – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 105°C Enhanced Diminishing Manufacturing

Contextual Info: bq4010/bq4010Y 8Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4010 is a nonvolatile 65,536-bit static RAM organized as 8,192 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

Contextual Info: bq2204A X4 SRAM Nonvolatile Controller Unit General Description Features ä Power monitoring and switching for 3-volt battery-backup applications ä Write-protect control ä 2-input decoder for control of up to 4 banks of SRAM ä 3-volt primary cell inputs

8251a usart interface from z80

Abstract: UDL TM 500 f922 verilog code for 8254 timer l912 256x32 POWER MODULE TM 31 udl 500 78K3 F5S4
Contextual Info: L4E75BS DÜHBÖGb 3ÔÔ B I N E C E CB-C7, 5-VOLT 0.8-M ICRON CELL-BASED CMOS ASIC NEC NEC Electronics Inc. August 1993 Description Figure 1. Integrated HDD Solution with CBC7 Cell-Based ASIC with Embedded 78K3 MPU, Compiled SRAMs and A/D Converters CB-C7 cell-based product family is a 0.8-micron drawn