SRAM 8K X 8 Search Results
SRAM 8K X 8 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Hitachi PIX-8144
Abstract: Hitachi PIX 8144 Pix-8144 PIX 8144 hitachi 8144 CY7C025-AC dual port 16 SRAM PLCC CY7C024 CY7C0241 CY7C0251
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CY7C0251 CY7C025 CY7C0241 CY7C024 CY7C145 CY7C144 CY7C139 CY7C138 CY7C133 CY7C143 Hitachi PIX-8144 Hitachi PIX 8144 Pix-8144 PIX 8144 hitachi 8144 CY7C025-AC dual port 16 SRAM PLCC CY7C024 CY7C0241 CY7C0251 | |
dual port SRAM PLCC
Abstract: CY7C133 CY7C138 CY7C139 CY7C143 CY7C144 CY7C145 CY7C016 CY7C024 CY7C0241
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CY7C0251 CY7C025 CY7C0241 CY7C024 CY7C145 CY7C144 CY7C139 CY7C138 CY7C133 CY7C143 dual port SRAM PLCC CY7C133 CY7C138 CY7C139 CY7C143 CY7C144 CY7C145 CY7C016 CY7C024 CY7C0241 | |
LT 543 IC pin diagram
Abstract: IC SRAM 8K X 8 microprocessor 80386 pin out diagram
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OCR Scan |
MT56C0818 52-Pin MT56C081B LT 543 IC pin diagram IC SRAM 8K X 8 microprocessor 80386 pin out diagram | |
96182
Abstract: cy7c024 CY131 CY7C0241 CY7C133 CY7C1342 CY7C135 CY7C138 CY7C139 CY7C143
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CY7C0241 CY7C024 CY7C145 CY7C144 CY7C139 CY7C134 CY7C1342 CY7C135 CY7C138 CY7C133 96182 cy7c024 CY131 CY7C0241 CY7C133 CY7C1342 CY7C135 CY7C138 CY7C139 CY7C143 | |
Ablestik
Abstract: CY7C024 CY7C0241 CY7C139 CY7C144 CY7C145
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CY7C0241 CY7C024 CY7C145 CY7C144 CY7C139 CY7C1342/135/138 CY7C133/143 7C0241C) CY7C0251-AC Ablestik CY7C024 CY7C0241 CY7C139 CY7C144 CY7C145 | |
Dp 140c
Abstract: CY7C006 CY7C016 CY7C025 CY7C0251 JESD22 8361H
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CY7C025 CY7C0251 CY7C006 CY7C016 7C0251D) 7C0251D CY7C0251-AC Dp 140c CY7C006 CY7C016 CY7C025 CY7C0251 JESD22 8361H | |
MT56C0816
Abstract: AW 55 IC LT 5251 80386 cache
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OCR Scan |
MT56C0816 52-pin MT56C0816EJ-25 4Kx16 AW 55 IC LT 5251 80386 cache | |
Contextual Info: MT56C3818 8K x 18, DUAL 4K x 18 CACHE DATA SRAM M IC R O N CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAMs with common addresses and data; also configurable as a single 8K x 18 SRAM |
OCR Scan |
MT56C3818 8Kx18 4KX18SRAM A0-A12) 52-Pin | |
74LS373 PIN CONFIGURATION AND SPECIFICATIONS
Abstract: intel 80386
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MT56C3816 A0-A12) 4Kx16 52-PIn S1993, 74LS373 PIN CONFIGURATION AND SPECIFICATIONS intel 80386 | |
Contextual Info: M lfP H M I y MT56C3816 8K x 16, DUAL 4K x 16 CACHE DATA SRAM SINGLE 8 Kx 16 SRAM, DUAL 4K x 16 SRAM CACHE DATA SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 16 SRAMs with common addresses and data; also configurable as a single 8K x 16 SRAM |
OCR Scan |
MT56C3816 A0-A12) 52-Pin | |
a12w
Abstract: 74LS373 PIN CONFIGURATION AND SPECIFICATIONS
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MT56C0818 52-Pin MT56C0B18 a12w 74LS373 PIN CONFIGURATION AND SPECIFICATIONS | |
T56 marking
Abstract: MT56C0816EJ mt56C0816
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52-Pin MT56C0816 T56 marking MT56C0816EJ | |
CY7C006
Abstract: CY7C016 CY7C025 CY7C0251 JESD22 MP8000C
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CY7C0251 CY7C025 CY7C016 CY7C006 84-Lead CY7C025) CY7C025-JC CY7C006 CY7C016 CY7C025 CY7C0251 JESD22 MP8000C | |
a623308amContextual Info: A623308A Series Preliminary 8K X 8 BIT CMOS SRAM Document Title 8K X 8 BIT CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue November 9, 2004 Preliminary November, 2004, Version 0.0 AMIC Technology, Corp. A623308A Series |
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A623308A A623308A-S A623308A-SI/SU a623308am | |
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i1991
Abstract: intel 80386 pin diagram
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A0-A12) 52-pin T56C3816 MT56C3B16 i1991 intel 80386 pin diagram | |
micron sram
Abstract: taa 723 MT5C6408 MT5C6408DJ-15
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MT5C6408 28-Pin micron sram taa 723 MT5C6408 MT5C6408DJ-15 | |
Contextual Info: STATIC SRAM RAM Random Access Memory TSOP LH5164AT-80L CMOS 64K 8K x 8 |
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LH5164AT-80L | |
Contextual Info: □PM DPS8M628 Dense-Pac Microsystems, Inc. 8K X 16 CMOS SRAM MODULE > DESCRIPTION: The DPS8M628 is a 128K bit Static Random Access Memory SRAM , complete with memory interface logic and on-board capacitors, organized as 8K X 16 bits. The DPS8M628 is ideally suited for high performance |
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DPS8M628 DPS8M628 40-Pin 01S-07 S8M628 100ns 120ns 150ns | |
Contextual Info: •M'SriiN Sí M l ! N | ) l ' ( i'OR l \< MT5C6408 883C 8K X 8 SRAM 8K X 8 SRAM SRAM AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT (Top View) • SM D 5962-38294 • M IL-STD-883 FEATURES • High speed: 12, 15, 20, 25 and 35ns • Battery backup: 2V data retention |
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MT5C6408 IL-STD-883 28-Pin MIL-STD-883 MT5C640S 0S000006 | |
5C6408
Abstract: 1293-D
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MT5C6408 28-Pin 5C6408 1293-D | |
Contextual Info: /T T SGS-THOMSON ^ 7#. llD M ILi sraMD(@l> M48Z58 CMOS 8K x 8 ZEROPOWER SRAM PRODUCT CONCEPT INTEGRATED LOW POWER SRAM and POWER-FAIL CONTROL CIRCUIT PIN and FUNCTION COMPATIBLE with JEDEC STANDARD 8K x 8 SRAMs SELF CONTAINED BATTERY in the CAPHAT DIP PACKAGE |
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M48Z58 PCDIP28 SOH28 M48Z58 | |
67164
Abstract: 0E12 UT67164 SRAM flatpack
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UT67164 0E-10 -55oC MIL-STD883 MIL-STD-883 28-pin 67164 0E12 SRAM flatpack | |
tefr1
Abstract: 0E12 UT67164
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UT67164 0E-10 -55oC MIL-STD883 MIL-STD-883 SRAM-5-12-97-DS tefr1 0E12 | |
Contextual Info: Standard Products UT67164 Radiation-Hardened 8K x 8 SRAM - SEU Hard Data Sheet December 1997 FEATURES q 55ns maximum address access time, single-event upset less than 1.0E-10 errors//bit day -55oC to 125+oC q Asynchronous operation for compatibility with industrystandard 8K x 8 SRAM |
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UT67164 0E-10 -55oC MIL-STD883 MIL-STD-883 SRAM-5-12-97-DS |