SSFR II Search Results

Contextual Info: j ~ i : B B 1.27PH PLCC 32PIN 3.8T?tM i I Z E Z . <L M r ! / o sa w aa * 11 iK*ir> wr-s ig s a g a a ia a M a a s e i J^SSfsTTW.^t^^lSStSm aniM B fr7 I, jT 1 ! ' h r m i ^ ^ ^ ^ g a fa g a jg '^S^SsSdi'^ ^4504X90.’ ;A304-X02" 'A 9W XS5 ^A5035i< ?s IV € ^y^SSFr

echo delay reverb ic

Abstract: 6-band graphic equalizer Multi-Effects Audio Processor guitar tuner 21056L mrf 447 Inter-ICs mrf 342 reverb sony MX 144
Contextual Info: a Using The Low-Cost, High Performance ADSP-21065L Digital Signal Processor For Digital Audio Applications Revision 1.0 - 12/4/98 dB +12 -12 Left Right Left EQ Right EQ Pan L R L R L R L R L R L R L R L R 1 2 3 4 5 6 7 8 Mic High L Line Mid R Play Back Bass

ADSP-21xxx

Abstract: dmd20 ic tms 1000 ADSP-21XXX MEMORY ADSP-2100 ADSP-21000 ADSP-21020 TSC21020F 21020F
Contextual Info: TSC21020F Radiation Tolerant 32/40–Bit IEEE Floating–Point DSP Microprocessor Introduction Atmel is manufacturing a radiation tolerant version of the Analog Devices ADSP–21020 32/40–Bit Floating–Point DSP. The product is pin and code compatible with ADI

IC top 223p

Abstract: TSC21020E
Contextual Info: TSC21020E Radiation Tolerant 32/40–Bit IEEE Floating–Point DSP Microprocessor Introduction TEMIC Semiconductors is manufacturing a radiation tolerant version of the Analog Devices ADSP–21020 32/40–Bit Floating–Point DSP. The product is pin and code compatible with ADI

4153E

Abstract: dma24 PMA21 TSC21020F-20MB-E
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • • • • Superscalar IEEE Floating-Point-Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 50 ns, 20 MIPS Instruction Rate, Single Cycle Execution

ADSP-21010

Abstract: adsp 21010 ADSP-21000 ADSP-21020 PMA23-0
Contextual Info: ANALOG DEVICES INC bSE » OfilböOO 003ÖÖ7Ö GENERAL DESCRIPTION The ADSP-21010 is the low-cost member of Analog Devices’ family of single-chip IEEE floating-point processors optimized for digital signal processing applications. It is a 12.5 MIPS, 32-bit-only version of the ADSP-21020 IEEE Floating-Point

ADSP-21xxx

Abstract: 21020F ADSP-2100 ADSP-21000 ADSP-21020 TSC21020F
Contextual Info: TSC21020F Radiation Tolerant 32/40–Bit IEEE Floating–Point DSP Microprocessor Introduction TEMIC Semiconductors is manufacturing a radiation tolerant version of the Analog Devices ADSP–21020 32/40–Bit Floating–Point DSP. The product is pin and code compatible with ADI

ADSP-21010

Abstract: ADSp21010 MRF 277 DMD29
Contextual Info: ANALOG DEVICES FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 80 ns, 12.5 MIPS Instruction Rate, Single-Cycle Execution 37.5 MFLOPS Peak, 25 MFLOPS Sustained Performance 1024-Point Complex FFT Benchmark: 1.54 ms

ADSP-21xxx

Abstract: mrf 212 PGA223 ADSP-21000 ADSP21020 ADSP-21020 TSC21020F DMD30
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • • • • • Superscalar IEEE Floating-Point-Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 50 ns, 20 MIPS Instruction Rate, Single Cycle Execution

IC top 223p

Abstract: MRF high power transistor TSC21020E 32 TSC21020E ADSP-21xxx dmd 20 mrf 212 High frequency MRF transistor MRF 238 mrf 245
Contextual Info: TSC21020E Radiation Tolerant 32/40–Bit IEEE Floating–Point DSP Microprocessor Introduction TEMIC Semiconductors is manufacturing a radiation tolerant version of the Analog Devices ADSP–21020 32/40–Bit Floating–Point DSP. The product is pin and code compatible with ADI

ADSP-21xxx

Abstract: TSC21020E MRF transistor 237 ADSP-2100 ADSP-21000 ADSP-21020 MRF 477 21020E
Contextual Info: TSC21020E MATRA MHS 32/40-Bit IEEE Floating-Point DSP Microprocessor Features D Superscalar IEEE Floating-Point-Processor D Off-Chip Harvard Architecture Maximizes Signal Processing Performance D 33 ns, 30 MIPS Instruction Rate, Single-Cycle Execution D 90 MFLOPS Peak, 60 MFLOPS Sustained Performance

Contextual Info: 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 ANALOG DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maxim izes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle

PMD4m

Abstract: pmd23 A0335 G03327 ADSP-21020 ADSP-2100 ADSP-21000 TSW161 PMD24 PMD32
Contextual Info: . ANALOG DEVICES INC OßlbBOO 0033252 5 I ¡ANA 4LE ]> -r-V9-/z-û<? IEEE Floating-Point DSP Microprocessor ANALOG DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance

ADSP21020BG120

Abstract: ADSP-21020
Contextual Info: BACK a FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution 100 MFLOPS Peak, 66 MFLOPS Sustained Performance 1024-Point Complex FFT Benchmark: 0.58 ms

ADSP-21020

Abstract: ADSP-2100 JR1F
Contextual Info: 1991 ADSP-21020 January 1991 For current information contact Analog Devices at 617 461-3881 ADSP-21020 IEEE Floating-Point DSP Microprocessor FEA TU RES Off-Chip H arvard A rchitecture M axim izes Signal P rocessing Perform ance P erform ance: • 60 MFLOPS Peak, 40 MFLOPS Sustained, Superscalar IEEE

Contextual Info: ANALOG DEVICES □ 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FE A T U R E S Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture M axim izes Signal Processing Performance 30 ns, 33.3 M IP S Instruction Rate. Single-Cycle

m15m R2

Abstract: ADSP-21XXX architecture ADSP-21020 adsp21020kg133
Contextual Info: ANALOG ► DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution

DSP-21020

Contextual Info: Temic TSC21020E S e m i c o n d u c t o r s Radiation Tolerant 32/40-Bit IEEE Floating-Point DSP Microprocessor Introduction TEMIC Semiconductors is manufacturing a radiation tolerant version of the Analog Devices ADSP-21020 32/40-Bit Floating-Point DSP. The product is pin and code compatible with ADI

ADSP-21xxx

Abstract: ADSP-21000 ADSP21020 ADSP-21020 TSC21020F
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • • • • Superscalar IEEE Floating-Point-Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 50 ns, 20 MIPS Instruction Rate, Single Cycle Execution

ADSP-21xxx

Abstract: ADSP-21000 ADSP21020 ADSP-21020 TSC21020F
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • • • • Superscalar IEEE Floating-Point-Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 50 ns, 20 MIPS Instruction Rate, Single Cycle Execution

ADSP-21000

Abstract: ADSP21020 ADSP-21020 TSC21020F M 9512 FY MQFPF-256 951200201
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • • • • • Superscalar IEEE Floating-Point-Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 50 ns, 20 MIPS Instruction Rate, Single Cycle Execution

4153E

Abstract: ADSP-21xxx 5962-9953901VXC TSC21020F DMD20 PMD39 mrf 174 mrf 212 ADSP-21000 ADSP21020
Contextual Info: Features • • • • • • • • • • • • • • • • • • • • • • • • • Superscalar IEEE Floating-Point-Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 50 ns, 20 MIPS Instruction Rate, Single Cycle Execution

DSP-21020

Abstract: ADSP-21020
Contextual Info: ANALOG DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution 100 MFLQPS Peak, 66 MFLOPS Sustained Performance

Contextual Info: ANALOG DEVICES INC bSE D ö l b ö D G 0D30fl7a TT1 D 32-Bit IEEE Floating-Point DSP Microprocessor ANALOG ► DEVICES FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 80 ns, 12.5 MIPS Instruction Rate, Single-Cycle