SSTL IO PAD Search Results

PLL 4046 4011 4017

Abstract: phase angle controller SIII52001-1 SSTL-15 SSTL-18
Contextual Info: Stratix III Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com SIII5V2-1.3 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

PLL 4046 4011 4017

Abstract: 5252 F 1107 SSTL-15 SIII52001-1 SSTL-18 4046 PLL Designers Guide 0906NS DDR SDRAM Controller VCO 1430 2230 MHz
Contextual Info: 1. Stratix III Device Datasheet: DC and Switching Characteristics SIII52001-1.3 Electrical Characteristics Operating Conditions When Stratix III devices are implemented in a system, they are rated according to a set of defined parameters. To maintain the highest possible

CSPT857C

Abstract: IDT74SSTVF16859 PC2100 PC2700 PC3200 SSTVF16859 Q11A Q13A
Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859

PC3200

Abstract: CSPT857C IDT74SSTVF16859 PC2100 PC2700 SSTVF16859 SSTL IO pad VO340
Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: IDT74SSTVF16859 DESCRIPTION: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859

Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O IDT74SSTVF16859 FEATURES: DESCRIPTION: • • • • • • • • • The SSTVF16859 is a 13-bit to 26-bit registered buffer designed for

Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859

CSPT857C

Abstract: IDT74SSTVF16859 PC2100 PC2700 PC3200 SSTVF16859
Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVF16859 PRELIMINARY 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859

PC3200

Contextual Info: IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • 1:2 registered output buffer 2.3V to 2.7V operation for PC1600, PC2100, and PC2700

CSPT857C

Abstract: IDT74SSTVF16859 PC2100 PC2700 PC3200 SSTVF16859
Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859

PC3200

Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: IDT74SSTVF16859 ADVANCE INFORMATION DESCRIPTION: • • • • • • • 2.3V to 2.7V Operation for PC1600, PC2100, and PC2700

Contextual Info: GN4121 x1 Lane PCI Express to Local Bridge Data Sheet GN4121 x1 Lane PCI Express to Local Bridge Data Sheet 51539 - 0 June 2009 www.gennum.com 1 of 30 Proprietary & Confidential Revision History Version ECR 152184 Date June 2009 Changes and Modifications Became Data Sheet.

arm cortex a9

Abstract: RMII PHY H.264 codec rgb led 16X32 encoder h.264 CMOS Sensor 1080p H.264 60 Tablets DIAGRAM SPEAR13 how to flash an android media "ARM Cortex A9"
Contextual Info: SPEAr1340 Dual-core Cortex A9 HMI embedded MPU Datasheet − preliminary data Features • CPU subsystem: – 2x ARM Cortex A9 cores, up to 600 MHz – 32+32 KB L1 caches per core, with parity check – Shared 512 KB L2 cache – Accelerator coherence port ACP

Contextual Info: IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • The SSTVN16859 is a 13-bit to 26-bit registered buffer designed for

PC3200

Contextual Info: IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • • The SSTVF16859 is a 13-bit to 26-bit registered buffer designed for

CSPT857C

Abstract: IDT74SSTVM16859 Q11A Q13A
Contextual Info: IDT74SSTVM16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVM16859 ADVANCE BUFFER WITH SSTL I/O INFORMATION FEATURES: DESCRIPTION: • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVM16859

SSTL IO pad

Contextual Info: IDT74SSTVM16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVM16859 BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • The SSTVM16859 is a 13-bit to 26-bit registered buffer designed for

SSTL IO pad

Abstract: d1064 IDT74SSTVN16859C PC2100 PC2700 PC3200
Contextual Info: IDT74SSTVN16859C 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVN16859C BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • 1:2 registered output buffer 2.3V to 2.7V operation for PC1600, PC2100, and PC2700

Contextual Info: IDT74SSTVN16859C 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVN16859C BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • The SSTVN16859C is a 13-bit to 26-bit registered buffer designed for

Contextual Info: IDT74SSTVN16859C 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVN16859C BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • The SSTVN16859C is a 13-bit to 26-bit registered buffer designed for

PC2700

Abstract: PC3200 SSTVN16859 IDT74SSTVN16859 PC2100
Contextual Info: IDT74SSTVN16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: IDT74SSTVN16859 DESCRIPTION: • • • • • • • • • 1:2 registered output buffer 2.3V to 2.7V operation for PC1600, PC2100, and PC2700

Contextual Info: IDT74SSTVM16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVM16859 BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVM16859

Contextual Info: IDT74SSTV16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O INDUSTRIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O IDT74SSTV16859 FEATURES: DESCRIPTION: • • • • • • The SSTV16859 is a 13-bit to 26-bit registered buffer designed for 2.3V2.7V VDD and supports low standby operation. All data inputs and outputs

IDT74SSTV16859

Abstract: Q11A Q13A SSTV16859
Contextual Info: IDT74SSTV16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O INDUSTRIAL TEMPERATURE RANGE IDT74SSTV16859 PRELIMINARY 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • 2.3V to 2.7V Operation SSTL_2 Class II style data inputs/outputs

Contextual Info: IDT74SSTVM16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED IDT74SSTVM16859 BUFFER WITH SSTL I/O FEATURES: DESCRIPTION: • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVM16859