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    SSTL16857 Price and Stock

    Rochester Electronics LLC SN74SSTL16857DGGR

    D FLIP-FLOP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74SSTL16857DGGR Bulk 39
    • 1 -
    • 10 -
    • 100 $7.75
    • 1000 $7.75
    • 10000 $7.75
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    Texas Instruments SN74SSTL16857DGGR

    D Flip-Flop, SSTL Series, 1-Func, Positive Edge Triggered, 14-Bit, True Output, PDSO48 '
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics SN74SSTL16857DGGR 12,000 1
    • 1 $7.45
    • 10 $7.45
    • 100 $7
    • 1000 $6.33
    • 10000 $6.33
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    SSTL16857 Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SSTL16857 NXP Semiconductors Memory interfaces; Support logic for memory modules and other memory subsystems Original PDF
    SSTL16857 Philips Semiconductors 14-bit SSTL_2 registered driver with differential clock inputs Original PDF
    SSTL16857DGG Philips Semiconductors 14 Bit SSTL-2 Registered Driver with Differential Clock Inputs Original PDF
    SSTL16857DGG Philips Semiconductors 14 Bit SSTL-2 Registered Driver with Differential Clock Inputs Scan PDF
    SSTL16857DGG Philips Semiconductors 14-bit SSTL_2 Registered Driver with Differential Clock Inputs Scan PDF
    SSTL16857DGG,512 NXP Semiconductors 14-bit SSTL_2 registered driver with differential clock inputs - Application: DDR SDRAM register ; Hold time (CLK-DATA): 0.5 ns; Inputs: 14 x SSTL-2 ; Operating frequency: 200 MHz; Operating temperature: 0~+70 Cel; Other features: master reset ; Outputs: 14 x SSTL-2 ; Propagation delay: 1.8 ns; Set-up time (DATA-CLK): 0.8 ns; Supply voltage: 2.53.3 V; Package: SOT362-1 (TSSOP48); Container: Tube Dry Pack Original PDF
    SSTL16857DGG,518 NXP Semiconductors 14-bit SSTL_2 registered driver with differential clock inputs - Application: DDR SDRAM register ; Hold time (CLK-DATA): 0.5 ns; Inputs: 14 x SSTL-2 ; Operating frequency: 200 MHz; Operating temperature: 0~+70 Cel; Other features: master reset ; Outputs: 14 x SSTL-2 ; Propagation delay: 1.8 ns; Set-up time (DATA-CLK): 0.8 ns; Supply voltage: 2.53.3 V; Package: SOT362-1 (TSSOP48); Container: Reel Dry Pack, SMD, 13" Original PDF
    SSTL16857DG-T Philips Semiconductors 14-bit SSTL_2 registered driver with differential clock inputs Original PDF

    SSTL16857 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SSTL-2

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS SSTL16857 14-bit SSTL_2 Registered Driver with Differential Clock Inputs Preliminary specification Philips Semiconductors 1998 Dec 10 Philips Semiconductors Preliminary specification 14-bit SSTL_2 Registered Driver with Differential Clock Inputs


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    PDF SSTL16857 14-bit SSTL16857 500mA SSTL-2

    CBT3857

    Abstract: PCK857 SSTL16857
    Text: INTEGRATED CIRCUITS SSTL16857 14-bit SSTL_2 registered driver with differential clock inputs Product specification Supersedes data of 1999 Apr 29 Philips Semiconductors 1999 Sep 30 Philips Semiconductors Product specification 14-bit SSTL_2 registered driver with


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    PDF SSTL16857 14-bit 500mA CBT3857 PCK857 SSTL16857

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS SSTL16857 14-bit SSTL_2 registered driver with differential clock inputs Product specification Supersedes data of 1999 Apr 29 Philips Semiconductors 1999 Sep 30 Philips Semiconductors Product specification 14-bit SSTL_2 registered driver with


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    PDF SSTL16857 14-bit SSTL16857 500mA SSTL16857DGG SSTL16857DG SSTL16857DG-T OT362

    CBT3857

    Abstract: JESD22-A114 JESD22-A115 JESD78 PCK857 SSTL16857
    Text: INTEGRATED CIRCUITS CBT3857 10-bit bus switch with 10 kΩ pull-down termination resistors Product specification Supersedes data of 1998 Dec 10 Philips Semiconductors 1999 Sep 14 Philips Semiconductors Product specification 10-bit bus switch with 10 kΩ pull-down


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    PDF CBT3857 10-bit CBT3857 JESD22-A114 JESD22-A115 JESD78 PCK857 SSTL16857

    PCK857

    Abstract: CBT3857 SSTL16857
    Text: INTEGRATED CIRCUITS PCK857 66–150MHz Phase Locked Loop Differential 1:10 SDRAM Clock Driver Preliminary specification Philips Semiconductors 1998 Dec 10 Philips Semiconductors Preliminary specification 66–150MHz Phase Locked Loop Differential 1:10 SDRAM Clock Driver


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    PDF PCK857 150MHz 1-to-10 100ps) PCK857 CBT3857 SSTL16857

    SC28L198

    Abstract: SCC2691AC1A28 LCD 09151 CSOT109 PCA9552 PCK2002 PCF8591 APPLICATION pecl clock so8 PCA9550 PCA9553
    Text: Interface Products Interface Products 67 I2C Logic Family Overview • Analog/Digital Converters It is frequency required to record analog information, such as temperature, pressure, battery level, signal strength, etc. The analog voltage information from the diode, pressure sensor,


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    PDF

    INSSTE32882

    Abstract: maxim dallas 2501 P16CV SY100EL16 SN65MLVD201 SN65EPT22 INCU877 INCUA877 ttl crystal oscillator using 7404 P16CV857B
    Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer


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    PDF

    Untitled

    Abstract: No abstract text available
    Text: SSTL16857


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    PDF PI74SSTL16857 14-Bit SSTL16857 48-pin PI74SSTL16857 micron14-Bit PS8434C

    DDR2 SSTL class

    Abstract: SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 DDR200 hp SSTU32866
    Text: Memory interfaces Support logic for memory modules and other memory subsystems Portfolio overview PC100 to PC133 • AVC, ALVC, AVCM, and ALVCH series registered drivers • PCK2509 and PCK2510 series PLL clock buffers DDR200 to DDR266 • SSTV and SSTL series registered drivers


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    PDF PC100 PC133 PCK2509 PCK2510 DDR200 DDR266 DDR333 DDR400 PCKVF857 DDR2-400 DDR2 SSTL class SSTL_18 DDR1-400 DDR2 SDRAM with SSTL_18 interface TVSOP-48 SSTL-18 PCK2059 SSTV16857 hp SSTU32866

    Hitachi DSA002714

    Abstract: Nippon capacitors
    Text: HB54A5129F1-A75B/B75B/10B 512 MB Registered DDR SDRAM DIMM 64-Mword x 72-bit, 1-Bank Module 18 pcs of 64 M × 4 Components ADE-203-1138 (Z) Preliminary Rev. 0.0 Dec. 10, 1999 Description The HB54A5129F1 is a 64M × 72 × 1-bank Double Data Rate (DDR) SDRAM Module, mounted 18 pieces


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    PDF HB54A5129F1-A75B/B75B/10B 64-Mword 72-bit, ADE-203-1138 HB54A5129F1 256-Mbit HM5425401BTT) Hitachi DSA002714 Nippon capacitors

    GTLP16612

    Abstract: GTLP16T1655 SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH16612
    Text: Using MAX 7000B Devices to Replace I/O Drivers December 2002, ver. 1.0 Introduction Application Note 293 The Altera MAX® 7000B device is the only product-term device capable of supporting the GTL+, SSTL-2, and SSTL-3 standards used in processor interfaces, backplane drivers, and SDRAM memory interfaces.


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    PDF 7000B GTLP16612 GTLP16T1655 SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH16612

    BUK2114

    Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
    Text: Index Type number Page number 1N4148 34 1N4531 34 1N47xxA series 44 1PS10SB62 32 1PS10SB63 32 1PS10SB82 32 1PS181 36 1PS184 36 1PS193 34 1PS226 36 1PS59SB10 28 1PS59SB14 28 1PS59SB15 28 1PS59SB16 28 1PS59SB20 30 1PS59SB21 28 1PS66SB17 32 1PS66SB62 32 1PS66SB63


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    PDF 1N4148 1N4531 1N47xxA 1PS10SB62 1PS10SB63 1PS10SB82 1PS181 1PS184 1PS193 1PS226 BUK2114 BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52

    INSSTE32882

    Abstract: maxim dallas 2501 insstua32866 INSSTU32864 INSSTU32866 ttl crystal oscillator using CIRCUIT DIAGRAM INCUA877 ps 2501 dallas GSM home automation block diagram INCU877
    Text: Clocks and Timing Guide www.ti.com/clocks 2Q 2009 2 Clocks and Timing Guide ➔ Clocks and Timing Selection Tree Clocks by Function Clock Distribution Non- PLL Fanout Buffers PLL Buffers RF Synthesizers Clock Generation General Purpose Generator/Synthesizer


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    PDF

    HB54A2569F1-10B

    Abstract: HM5425801BTT
    Text: HB54A2569F1-10B 256 MB Registered DDR SDRAM DIMM 32-Mword x 72-bit, 1-Bank Module 9 pcs of 32 M × 8 Components Preliminary Rev. 0.0 Jan. 25, 2000 Description The HB54A2569F1 is a 32M × 72 × 1-bank Double Data Rate (DDR) SDRAM Module, mounted 9 pieces of


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    PDF HB54A2569F1-10B 32-Mword 72-bit, HB54A2569F1 256-Mbit HM5425801BTT) JC-42 Byte72 HB54A2569F1-10B HM5425801BTT

    LVC161284

    Abstract: Abstract schematic power transistor SN65LVDS100 Application Report SLLA067A PCI21 datasheet compaq notebook cable lcd 14.1 Spectrum VME64 "USB Streaming Controller" modbus code pic RS232 MECHANICAL MOUSE
    Text: Application Report SLLA067A - March 2000−Revised February 2004 Comparing Bus Solutions Georg Becke, Christian Borgert, Steve Corrigan, Frank Dehmelt, Matthias Feulner, Carmen Gonzalez, Michael Groenebaum, Firoj Kabir, Arek Kacprzak, Clark Kinnaird, Johann Zipperer


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    PDF SLLA067A 2000-Revised LVC161284 Abstract schematic power transistor SN65LVDS100 Application Report PCI21 datasheet compaq notebook cable lcd 14.1 Spectrum VME64 "USB Streaming Controller" modbus code pic RS232 MECHANICAL MOUSE

    GTLP16612

    Abstract: SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH1645 SN74GTLPH16612 sstl lvttl Translator SSTV16857
    Text: White Paper MAX 7000B デバイスを使用した I/O ドライバのリプレイス イントロダクション アルテラの MAX 7000B デバイスはプロセッサ・インタフェース、バックプレーン・ドライバ、SDRAM メモリ・インタ


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    PDF 7000B 7000B M-WP-MAX7000B-01/J GTLP16612 SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH1645 SN74GTLPH16612 sstl lvttl Translator SSTV16857

    Untitled

    Abstract: No abstract text available
    Text: SSTL16857


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    PDF PI74SSTL16857 14-Bit SSTL16857 48-pin PI74SSTL16857 PS8434C

    serdes hdmi optical fibre

    Abstract: NEC plasma tv schematic diagram sublvds to lvds transformer usb to parallel IEEE1284 centronics diagram LVDT1422 notebook led screen LVDS 40pin connector pinout DVD player optical pick up pin configuration HDMI to vga pinout ecl video input to output vga schematic Infrared Data Access
    Text: Application Report SLLA067B – March 2000 – Revised October 2009 Comparing Bus Solutions Technical Staff . Texas Instruments Incorported ABSTRACT The strong interest in this application report lead to this third edition. In addition to changes and updates


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    PDF SLLA067B serdes hdmi optical fibre NEC plasma tv schematic diagram sublvds to lvds transformer usb to parallel IEEE1284 centronics diagram LVDT1422 notebook led screen LVDS 40pin connector pinout DVD player optical pick up pin configuration HDMI to vga pinout ecl video input to output vga schematic Infrared Data Access

    MCK 240 Motion Control Kit DEMO

    Abstract: RTDX simulink example DSP BASED ONLINE UPS design tms320vC5402 starter kit usb microphone block diagram mp3 player pic based PMC-FPDP COTS high-accuracy clock sources pioneer stack audio power amplifiers pwm simulink matlab 3 phase
    Text: JANUARY 2000 T H E W O R L D L E A D E R I N D S P inside Free A N D A N A L O G VOL. 2 • JANUARY 2000 N E W T E C H N I C A L I N F O R M A T I O N O N T I ’ S D S P, A N A L O G A N D L O G I C D E V I C E S ‘Analog Applications’ journal Advanced DSP technology roadmap


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    PDF SSFN032 MCK 240 Motion Control Kit DEMO RTDX simulink example DSP BASED ONLINE UPS design tms320vC5402 starter kit usb microphone block diagram mp3 player pic based PMC-FPDP COTS high-accuracy clock sources pioneer stack audio power amplifiers pwm simulink matlab 3 phase

    GTLP16612

    Abstract: SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH1645 SN74GTLPH16612 SSTL-3 sstl lvttl Translator
    Text: White Paper Using MAX 7000B Devices to Replace I/O Drivers Introduction The Altera® MAX® 7000B device is the only product-term device capable of supporting the GTL+, SSTL-2, and SSTL-3 standards used in processor interfaces, backplane drivers, and SDRAM memory interfaces.


    Original
    PDF 7000B 7000B, GTLP16612 SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH1645 SN74GTLPH16612 SSTL-3 sstl lvttl Translator

    SLLA067

    Abstract: IEC-93 TUSB2046 usb to parallel IEEE1284 centronics diagram APPLE LVDS SCREEN PINOUT LVC161284 SLOTTED OPTICAL SWITCH 1142 notebook led screen LVDS connector pinout 1394 firewire to USB Connection Diagram VME64 termination
    Text: Application Report SLLA067 - March 2000 Comparing Bus Solutions F. Alicke; F. Bartholdy; S. Blozis; F. Dehmelt; P. Forstner; N. Holland; J. Huchzermeier MSLP Europe ABSTRACT This report is intended to be a reference tool for finding the most appropriate bus interface


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    PDF SLLA067 IEC-93 TUSB2046 usb to parallel IEEE1284 centronics diagram APPLE LVDS SCREEN PINOUT LVC161284 SLOTTED OPTICAL SWITCH 1142 notebook led screen LVDS connector pinout 1394 firewire to USB Connection Diagram VME64 termination

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS CBT3857 10-bit bus switch with 10kΩ pull-down termination resistors Preliminary specification Philips Semiconductors 1998 Dec 10 Philips Semiconductors Preliminary specification 10-bit bus switch with 10kΩ pull-down termination resistors


    Original
    PDF CBT3857 10-bit CBT3857

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS SSTL16857 14-bit SSTL_2 Registered Driver with Differential Clock Inputs Product specification Philips Semiconductors 1999 A pr 09 PHILIPS Philips Semiconductors Product specification 14-bit SSTL 2 Registered Driver with , 7;, . ~ . Differentia C ock Inputs


    OCR Scan
    PDF SSTL16857 14-bit

    CBT3857

    Abstract: PCK857 SSTL16857 L1685
    Text: Philips Semiconductors Product specification QqT i 1 r«c 7 14-bit SSTL_2 Registered Driver with Differential Clock Inputs before a stable clock has been supplied, the device must support an asynchronous input pin reset , which w hen held to the LOW state


    OCR Scan
    PDF 14-bit SSTL16857 500mA PCK857 CBT3857 SSTL16857 CBT3857 L1685