ST W24C Search Results

Contextual Info: August 1996 54ABT/74ABT646 Octal Transceivers and Registers with TRI-STATE Outputs General Description Features The ’ABT646 consists of bus transceiver circuits with TRI­ STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus

Contextual Info: S E M I C O N D U C T O R tm 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both En­ able En inputs are LOW, the data that appears at an output

DM54151A

Abstract: 54151A
Contextual Info: June 1989 54150/DM54150/DM74150, 54151A/DM54151A/DM74151A Data Selectors/Multiplexers General Description Features These data selectors/multiplexers contain full on-chip de­ coding to select the desired data source. The 150 selects one-of-sixteen data sources; the 151A selects one-of-eight

MAX PLUS II free alu

Abstract: ab-13 national
Contextual Info: June 1992 DM54LS181/DM74LS181 4-Bit Arithmetic Logic Unit General Description Features The ’LS181 is a 4-bit Arithmetic Logic Unit ALU which can perform all the possible 16 logic operations on two variables and a variety of arithmetic operations. • Provides 16 arithmetic operations: add, subtract, com­

Contextual Info: Semiconductor 54ACTQ827 Quiet Series 10-Bit Buffer/Line Driver with TRI-STATE Outputs General Description Inputs and outputs on opposite sides of package allow easy interface w ith m icroprocessors The ’AC TQ 827 10-bit bus buffer provides high perform ance

LVX3245

Contextual Info: Semiconductor 54LVX3245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs General Description Features The LVX3245 is a dual-supply, 8-bit translating transceiver that is designed to interface between a 3V bus and a 5V bus in a mixed 3V/5V supply environment. The Transmit/Receive

Contextual Info: I R C H I L D S E M IC O N D U C T O R T M DM74LS181 4-Bit Arithmetic Logic Unit General Description Features The ’LS181 is a 4-bit A rithm etic Logic U nit ALU w hich can perform all the possible 16 logic operations on tw o variables and a variety of arithm etic operations.

74ACQ544

Abstract: E28A J24F
Contextual Info: & March 1993 74ACQ544 • 54ACTQ/74ACTQ544 Quiet Series Octal Registered Transceiver with TRI-STATE Outputs General Description Features The ’A C Q /’ACTQ544 is an inverting octal transceiver con­ taining two sets of D-type registers for temporary storage of

F100K

Abstract: J24E
Contextual Info: S E M IC O N D U C T O R tm 100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both En­ able En inputs are LOW, the data that appears at an output

74ACQ657

Abstract: E28A J24F f20l diode f20l ge040
Contextual Info: March 1993 74ACQ657 • 54ACTQ/74ACTQ657 Quiet Series Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and TRI-STATE Outputs General Description Features The ’A C Q /’ACTQ657 contains eight non-inverting buffers with TRI-STATE outputs and an 8-bit parity generator/