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Synergy Semiconductor Corp SY100S324FC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Quest Components	SY100S324FC		8			1 $20.8278 10 $18.5136 100 $18.5136 1000 $18.5136 10000 $18.5136	Buy Now

SY100S324FC Datasheets (8)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF	PDF Size	Page count
SY100S324FC		Micrel Semiconductor	Low Power Hex TTL-to-ECL Translator		Original	PDF	97.54KB	5
SY100S324FC		Micrel Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Original	PDF	104.7KB	5
SY100S324FC		Microchip Technology	Integrated Circuits (ICs) - Logic - Translators, Level Shifters - IC TRNSLTR UNIDIR 24CERPACK		Original	PDF	118.68KB
SY100S324FC		Synergy Semiconductor	LOW POWER HEX TTL-TO-ECL TRANSLATOR		Scan	PDF	96.48KB	4
SY100S324FC		Synergy Semiconductor	Low Power Hex TTL-to-ECL Translator		Scan	PDF	358.35KB	6
SY100S324FC		Synergy Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Scan	PDF	94.65KB	4
SY100S324FC		Synergy Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Scan	PDF	95.02KB	4
SY100S324FCTR		Micrel Semiconductor	LOW POWER HEX TTL-to-ECL TRANSLATOR		Original	PDF	513.4KB	6

SY100S324FC Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
LD 757 ps Contextual Info: * LOW POW ER HEX TTL-to-ECL TRANSLATO R SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. The inputs are TTL com patible with diffe re n tia l o utputs that can e ith e r be	OCR Scan	SY100S324 F100K SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 LD 757 ps	PDF
Contextual Info: ^ LOW POWER HEX TTL-tO-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR DESCRIPTION FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used	OCR Scan	SY100S324 SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1	PDF
D241 diode Abstract: TIL 1025 block diagram of VCD PS 1025 SY100S324 SY100S324DC SY100S324FC SY100S324JC Contextual Info: This Material Copyrighted By Its Respective Manufacturer SY100S324 SEM IC O N D U C TO R BLOCK DIAGRAM DC ELECTRICAL CHARACTERISTICS Vee = - 4 .2 V to - 5 .4 6 V un le ss o th e rw is e specified, V c c = V c c a = G N D , V t t l = -+4.5V to -+5.5V, T a = 0 °C to + 85°C	OCR Scan	SY100S324 T0D13Ã SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 D241 diode TIL 1025 block diagram of VCD PS 1025 SY100S324	PDF
F100K Abstract: SY100S324 SY100S324FC SY100S324JC SY100S324JCTR q-0316 Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used as an inverting/non-inverting translator or as	Original	SY100S324 J28-1 F24-1 SY100S324JC SY100S324JCTR SY100S324 F24-1) F100K SY100S324FC SY100S324JC SY100S324JCTR q-0316	PDF
D121D Abstract: 100S324 D2627 Contextual Info: * L O W P O W E R HEX TTL-i d-ECl . T R A N S L A T O R SYNERGY w 100S 324 S E M IC O N D U C T O R FEATURES • Max. propagation delay of 1.4ns ■ IEE min. of -70m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option: V ee = -4.2V to -5.5V	OCR Scan	F100K 24-pin 28-pin SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 D121D 100S324 D2627	PDF
Contextual Info: * LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be	OCR Scan	SY100S324 SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 100S324JC J28-1 SY100S324JCTR	PDF
F100K Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC 01oT Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERG Y SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70mA Industry standard 100K ECL levels Extended supply voltage option: Vee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for	OCR Scan	SY100S324 -70mA F100K 24-pin 28-pin SY100S324 J28-1) F100K SY100S324DC SY100S324FC SY100S324JC 01oT	PDF
F100K Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR Contextual Info: SYNERGY SY100S324 LOW POWER HEX TTL-to-ECL TRANSLATOR SEMICONDUCTOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL	Original	SY100S324 SY100S324 00S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 F100K SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR	PDF
Contextual Info: * LOW POW ER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for	OCR Scan	SY100S324 F100K 24-pin 28-pin SY100S324	PDF
F100K Abstract: SY100S324 SY100S324FC SY100S324FCTR SY100S324JC Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V	Original	SY100S324 F100K 24-pin 28-pin SY100S324 M9999-061306 F100K SY100S324FC SY100S324FCTR SY100S324JC	PDF
Contextual Info: « LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns ■ I ee mln. of -70mA ■ ESO protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option: — VEE = -4.2V to -5.46V	OCR Scan	SY100S324 -70mA F100K SY100S324 T0D13Ã SY100S324DC D24-1 SY100S324FC F24-1	PDF
F100K Abstract: SY100S324 SY100S324DC D2418 Contextual Info: * LOW PO W ER HEX TTL-to-E C L TRANSLATO R SYNERGY S E M IC O N D U C T O R FEATURES SY100S324 DESCRIPTION Max. propagation delay of 1,4ns min. of —70mA The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL	OCR Scan	SY100S324 F100K D24-1 TD013Ã 0DD21Ã SY100S324DC D24-1 SY100S324FC F24-1 F100K SY100S324 D2418	PDF
F100K Abstract: SY100S324 SY100S324FC D241 diode Contextual Info: ^001301 000232'ì bET «0» LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. T he inputs are TTL com patible w ith diffe re n tia l outputs th a t can e ither be	OCR Scan	SY100S324 -70mA F100K D24-1 1DD13Ã SY1OOS324DC D24-1 SY100S324FC F24-1 SY100S324JC F100K SY100S324 D241 diode	PDF
Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used as an inverting/non-inverting translator or as	Original	SY100S324 J28-1 SY100S324JC SY100S324JCTR SY100S324 F24-1) J28-1)	PDF