SY100S324JC Search Results

LD 757 ps

Contextual Info: * LOW POW ER HEX TTL-to-ECL TRANSLATO R SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. The inputs are TTL com patible with diffe re n tia l o utputs that can e ith e r be

Contextual Info: ^ LOW POWER HEX TTL-tO-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR DESCRIPTION FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used

D241 diode

Abstract: TIL 1025 block diagram of VCD PS 1025 SY100S324 SY100S324DC SY100S324FC SY100S324JC
Contextual Info: This Material Copyrighted By Its Respective Manufacturer SY100S324 SEM IC O N D U C TO R BLOCK DIAGRAM DC ELECTRICAL CHARACTERISTICS Vee = - 4 .2 V to - 5 .4 6 V un le ss o th e rw is e specified, V c c = V c c a = G N D , V t t l = -+4.5V to -+5.5V, T a = 0 °C to + 85°C

F100K

Abstract: SY100S324 SY100S324JC SY100S324JCTR
Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V

F100K

Abstract: SY100S324 SY100S324FC SY100S324JC SY100S324JCTR q-0316
Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used as an inverting/non-inverting translator or as

Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V

D121D

Abstract: 100S324 D2627
Contextual Info: * L O W P O W E R HEX TTL-i d-ECl . T R A N S L A T O R SYNERGY w 100S 324 S E M IC O N D U C T O R FEATURES • Max. propagation delay of 1.4ns ■ IEE min. of -70m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option: V ee = -4.2V to -5.5V

Contextual Info: * LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be

F100K

Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC 01oT
Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERG Y SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70mA Industry standard 100K ECL levels Extended supply voltage option: Vee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for

F100K

Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR
Contextual Info: SYNERGY SY100S324 LOW POWER HEX TTL-to-ECL TRANSLATOR SEMICONDUCTOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL

Contextual Info: * LOW POW ER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for

F100K

Abstract: SY100S324 SY100S324FC SY100S324FCTR SY100S324JC
Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR Micrel, Inc. DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ SY100S324 SY100S324 Max. propagation delay of 1.4ns IEE min. of –70mA Industry standard 100K ECL levels Extended supply voltage option: VEE = –4.2V to –5.5V

Contextual Info: « LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns ■ I ee mln. of -70mA ■ ESO protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option: — VEE = -4.2V to -5.46V

F100K

Abstract: SY100S324 SY100S324DC D2418
Contextual Info: * LOW PO W ER HEX TTL-to-E C L TRANSLATO R SYNERGY S E M IC O N D U C T O R FEATURES SY100S324 DESCRIPTION Max. propagation delay of 1,4ns min. of —70mA The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL

Contextual Info: LOW POWER HEX TTL-to-ECL TRANSLATOR FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used as an inverting/non-inverting translator or as

Contextual Info: • 5 0 G 1 3 fll ÜDDSBST 1 2 e] WÊ L O W P O W E R H EX T T L -to -E C L T R A N S L A T O R SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns T h e S Y 1 0 0 S 3 2 4 is a h e x tra n s la to r d e s ig n e d to co n v e rt