SY10H Search Results

Contextual Info: .M i P ln r k W n r k c ^ 3.3V SINGLE SUPPLY 1:9 PECL-TO-TTL SYNERGY PRELIMINARY SY10H641L SY100H641L SEM ICONDUCTOR FEATURES DESCRIPTION • 3 .3 V p o w e r s u p p ly ■ P E C L -to -T T L v e rs io n o f p o p u la r E C L in P S E111 ■ G u a ra n te e d lo w s k e w s p e c ific a tio n

ic 192 ttl

Contextual Info: 3.3V SINGLE SUPPLY Q UAD V P E C L T O .T T I S YN ER G Y ° WITH LATCHED O UTPUT ENABLE S M tC O N D U C T O R Clockworks PRELIMINARY SY10H842L SY100H842L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

Contextual Info: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC

Contextual Info: SING LE SUPPLY Q U A D P EC L-TO -TTL Clockworks SY10H842 W /LA TC H E D O UTPUT E N A B L E sÈ llb ólÌD U C T O R SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise

Contextual Info: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply

Contextual Info: >0 » 9-BIT ECL-TO-TTL WITH 3-STATE ENABLE SYNERG Y SY10H601 SY100H601 SEMICONDUCTOR DESCRIPTION FEATURES 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise

Contextual Info: * SYNERGY REGISTERED HEX TTL-TO-PECL SY10H606 SY100H606 SEMICONDUCTOR DESCRIPTION FEATURES • Differential 50fì ECL outputs ■ Choice between differential PECL or TTL clock input ■ Single +5V power supply ■ V bb output for single-ended use ■ Multiple power and ground pins to minimize noise

Contextual Info: ClockWorks SY10H841L SY100H841L FINAL 3.3V SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE DESCRIPTION FEATURES • ■ ■ ■ ■ 3.3V power supply Translates positive ECL to TTL PECL-to-TTL 300ps pin-to-pin skew 500ps part-to-part skew Differential internal design for increased noise

Contextual Info: ClockWorks SY10H641 SY100H641 FINAL SINGLE SUPPLY 1:9 PECL-TO-TTL FEATURES Input frequencies up to 135MHz PECL-to-TTL version of popular ECLinPS E111 Guaranteed low skew specification Latched input Differential internal design VBB output VECL for single-ended operation

Contextual Info: QUAD CMOS-to-PECL TRANSLATOR FEATURES DESCRIPTION The SY10H352 is a quad translator for interfacing data between a CMOS logic section and the PECL section of digital systems when only a +5.0V VDC power supply is available. The SY10H352 has CMOS compatible inputs

Contextual Info: SY10H603 SY100H603 FINAL 9-BIT LATCHED ECL-TO-TTL DESCRIPTION FEATURES Q8 GND Q7 BLOCK DIAGRAM Q6 PIN CONFIGURATION GND VCCT 25 24 23 22 21 20 19 Q4 26 18 Q3 27 17 D8 D7 VCCT 28 16 VCCE Q2 1 15 GND Q1 Q0 2 D6 D5 OEECL D0 D Q Q0 EN D1 D Q Q1 EN D2 D Q TOP VIEW

Contextual Info: SY10H601 SY100H601 FINAL 9-BIT ECL-TO-TTL WITH 3-STATE ENABLE DESCRIPTION FEATURES OEECL OETTL 25 24 23 22 21 20 19 Q4 Q3 26 18 27 17 VCCT Q2 GND Q1 28 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 Q7 Q0 ECL D8 16 TOP VIEW PLCC 1 15 2 14 3 13 4 12 5 6 7 TTL 8 9 D8

mr 4020

Contextual Info: SY10H606 SY100H606 FINAL REGISTERED HEX TTL-TO-PECL FEATURES Differential 50Ω ECL outputs Choice between differential PECL or TTL clock input Single +5V power supply VBB output for single-ended use Multiple power and ground pins to minimize noise Specified within-device skew

Contextual Info: REGISTERED HEX TTL-TO-PECL TRANSLATOR SYNERGY SEMICONDUCTOR FEATURES ADVANCE INFORMATION SY10H606 SY100H606 DESCRIPTION • Differential 50i2 ECL outputs ■ Choice between differential PECL or TTL clock input ■ Single +5V power supply ■ V bb output for single-ended use

Contextual Info: ÌOOlBfll D G G 2 3E S Tfl3 A 3.3V SINGLE SUPPLY QUAD PECI TO TTI Q Y N F R im V S E M IC O N W & -O R WITH LATCHED OUTPUT ENABLE Clockworks^“ PRELIMINARY SY10H842L SY100H842L DESCRIPTION FEATURES • 3.3V power supply ■ Translates positive ECL to TTL PECL-to-TTL

Contextual Info: * 1:9 TTL CLOCK DRIVER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Low skew typically 0.65ns within device The SY10H645 is a single supply, low skew, TTL I/O 1:9 Clock Driver. Devices in the H600 clock driver family utilize the 28-lead PLCC for optimal power and signal pin

Contextual Info: SYNERGY SEMI CO NDUC TO R « 57E D • TQQiaöl 000G37S 754 SINGLE SUPPLY PECL-TTL 1:9 CLOCK DRIVER SYNERGY SEMICONDUCTOR AD VAN CE INFORMATION SY10H641 SY100H641 - r - S Z - 19 FEA TU R ES DESCRIPTION ■ P E C L -T T L version of popular ECLInPS E111 ■ Low skew

Contextual Info: PECL-to-TTL TRANSLATOR FEATURES DESCRIPTION The SY10H350 consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input. The SY10H350 is designed to be used primarily in

GE-314

Abstract: SY100H842L SY10H842L SY10H842LZC SY10H842LZCTR
Contextual Info: ClockWorks PRELIMINARY SY10H842L SY100H842L 3.3V SINGLE SUPPLY QUAD PECL-TO-TTL OUTPUT ENABLE FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION 3.3V power supply Translates positive ECL-to-TTL PECL-to-TTL 300ps pin-to-pin skew 500ps part-to-part skew

mr 4020

Abstract: H606 SY100H606 SY10H606 SY10H606JC VCCE13
Contextual Info: REGISTERED HEX * p r e l im in a r y T T L -T O -P E C L TRANSLATO R 1 S Y N c rfU Y SEMICONDUCTOR SY10H606 SY100H606 DESCRIPTION FEATURES • Differential 50 £2 ECL outputs ■ Choice between differential PECL or TTL clock input ■ Single +5V power supply

SY100H602

Abstract: SY100H602JC SY10H602 SY10H602JC
Contextual Info: This Material Copyrighted By Its Respective Manufacturer SY10H602 SY100H602 SEM IC O N D U C TO R TR U TH T A B L E Q D LEN MR ENECL L L L H L H L L H H X H L H Qo X X H H L X X X L L DC E LE C TR IC A L C H A R A C T E R IS T IC S V c c t = 5.0V ± 10%; V ee = - 5 .2 V ± 5% 10H Version ; V ee = -4 .5 V ± 0.3V (100H Version)

SY100H603

Abstract: SY100H603JC SY10H603 SY10H603JC SY10H603JCTR
Contextual Info: SYNERGY SY10H603 SY100H603 9-BIT LATCHED ECL-TO-TTL SEMICONDUCTOR SYNERGY SY10H603 SY100H603 SEMICONDUCTOR DESCRIPTION FEATURES • 9-bit ideal for byte-parity applications ■ 3-state TTL outputs ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize

SY100H842

Abstract: SY100H842ZC SY10H842 SY10H842ZC SY10H842ZCTR
Contextual Info: SINGLE SUPPLY QUAD PECL-TO-TTL WITH LATCHED OUTPUT ENABLE SYNERGY SEMICONDUCTOR SYNERGY SEMICONDUCTOR ClockWorks SY10H842 ClockWorks™ SY100H842 SY10H842 SY100H842 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew

Contextual Info: Precision Edge SY10H641 ® Precision Edge SY100H641 SINGLE SUPPLY 1:9 PECL-TO-TTL Micrel, Inc. SY10H641 SY100H641 FEATURES • Input frequencies up to 135MHz ■ PECL-to-TTL version of popular ECLinPS E111 ■ Guaranteed low skew specification Precision Edge®