T00B Search Results

Contextual Info: IBM014405 IBM014405B 1 M x 4 10/10 EDO DRAM Features • 1,048,576 word by 4 bit organization - Active max - 95 mA / 80 mA (3.3V) - 85 mA / 70 mA (5.0V) - Standby Current: TTL Inputs (max) - 2.0 mA - Standby Current: CMOS Inputs (max) - 1.0 mA • Power Supply: 3.3V ± 0.3V or 5.0V ± 0.5V

Contextual Info: IBM0165165B IBM0165165P 4M X 16 12/10 EDO DRAM Features 4,194,304 word by 16 bit organization Dual CAS Byte Read/Write Single 3.3 ± 0.3V power supply Performance: Extended Data Out Hyper Page Mode CAS before RAS Refresh - 4096 cycles/retention Time RAS only Refresh

Contextual Info: IBM0117800 IBM0117800M IBM0117800B IBM0117800P 2 M x 8 11/10 DRAM Features • 2,097,152 word by 8 bit organization • Single 3.3V ± 0 .3V or 5.0V ± 0.5V power supply • Standard Power SP and Low Power (LP) • 2048 Refresh Cycles - 32 ms Refresh Rate (SP version)

Contextual Info: m ICWORKS UJ30C516 ZOOMDAC DSP-BASED MULTIMEDIA RAMDAC PRELIMINARY, SEPTEMBER 1994 8 ,15» 16 or 24 bit-per-pixel modes -XGA™ , HICOLOR™, TARGA™ - Pixel-by-Pixel mode switching Oa-Chlp Voltage Reference Software-readable output sense Device and manufacturer ID

Contextual Info: IB M 0 1 5 1 6 0 IB M 0 1 5 1 6 1 256K X 16 DRAM Features • 256K X • 66MHz EDO performance 16 DRAM • Non-Persistent WPBM mode • Performance: Parameter -40 -50 -60 tRP RE Precharge 20ns 25ns 30ns tCAC Access Time from CË 12ns 14ns 15ns Ua Column Address Access

Contextual Info: IB M 1 1 D 1 3 2 5 B IB M 1 1 D 2 3 2 5 B 1M/2M x 32 DRAM Module Features • 72-Pin JEDEC Standard Single-In-Une Memory Modules • Performance: -6 0 -7 0 ! t RAc ! RA S A ccess Tim e 60ns 70ns ; tcAc I C A S A ccess Tim e 15ns 18ns I aa ; Access Tim e From Address

SO-DIMM 144-pin

Contextual Info: IBM11T1640L 1M x 64 144 PIN SODIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • Performance: -60 -70 tRAC RAS Access Time 60ns 70ns fcAC CAS Access Time 15ns 20ns tAA Access Time From Address 30ns

Contextual Info: 19-4385; Rev 0; 3/09 Digital Temperature Sensor and Thermal Watchdog with 2-Wire Interface The LM75 temperature sensor includes a delta-sigma analog-to-digital converter, and a digital overtemperature detector. The host can query the LM75 through its I 2 C interface to read temperature at any time. The

Contextual Info: IBM11S2325HP IBM11S4325HP IBM11S2325HM IBM11S4325HM 2M/4M x 32 SO DIMM Module Features • 72-Pin Small Outline Dual-In-Line Memory Module • Performance: -60 -6R -70 I rAC RAS A ccess T im e ; 60ns j 60ns 70ns fcAC CAS Access Tim e i 15ns [ 17ns 20ns AA Access Tim e From Address

Contextual Info: LM75B, LM75C www.ti.com SNIS153B – JULY 2009 – REVISED MARCH 2013 LM75B LM75C Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface Check for Samples: LM75B, LM75C FEATURES DESCRIPTION • • The LM75B and LM75C are industy-standard digital

Contextual Info: Series 299 DUAL-IN-LINE SOCKETS Right Anale Mount closed Frame • For com ponents to be m ounted perpendicularly to the PCB, such as LED displays. —— j .11Q|— • R ight angle solder tails are available w ith e ither .300" standard or .100“ row spacing.

Contextual Info: IBM2520L8767 Preliminary ATM Resource Manager Features other uses DRAM devices. A single array of memory can be used in systems whose sus­ tained full-duplex total bandwidth requirement is less than 102Mb/s. • Optimized for server applications. • Configurable for sustained performance of up to

Contextual Info: f t À P E R I C O M PI74LPT16543 Fast CMOS 16-Bit Latched Transceivers Product Features: Product Description: • Compatible with LCX and LVT™ families of products

A6364

Contextual Info: DUAL-IN-LINE PIN SOCKETS Elevated Open Frame iREGilDIR .0 1 6 - , 0 2 2 Series 116 For mechanical and electrical interconnec­ tion and stacking of PCB’s. tv .0 1 0 * 0 18 Other platings and heights on request. Hi-Rel, 4-finger #30 clip. See page 150 for

D78P014

Abstract: PD78P014 P25Y 14gc D78P0 d78p014 nec
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUII _ ¿ ¿ P P 7 8 P 0 1 4 8-BIT SINGLE-CHIP M ICROCONTROLLER DESCRIPTION T h e ;iP D 7 8 P 0 1 4 is a m em b e r of the pP D 78014 su b se rie s of 78K/0 se rie s products. It u se s a one-tim e-program m able

Practices

Contextual Info: LM75B,LM75C LM75B LM75C Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface Literature Number: SNIS153A Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface General Description Applications The LM75B and LM75C are industy-standard digital temperature sensors with an integrated Sigma-Delta analog-to-digital converter and I2C interface. The LM75 provides 9-bit

Contextual Info: IBM14M3272IBM14M6472 IBM14M3264 High Performance SRAM Modules Features • 256K and 512K secondary cache module family using Synchronous and Asynchronous SRAM for PowerPC applications • Single +3.3V or +5V, +/- 5% power supply • Organized as a 32K or 64K x 72 package on a

Contextual Info: IBM014445 IBM014445B 1M x 4 10/10 QUAD CAS EDO DRAM Features • Standard Power Low Power Dissipation 1,048,576 word by 4 bit organization - Active max - 95 mA / 80 mA (3.3V) - 85 mA / 70 mA (5.0V) QUAD CAS Parity Extended Data Out (Hyper Page) Mode - Standby Current: T T L Inputs (max)

Contextual Info: IBM043610ULAA IBM041810ULAA Prelim inary 32K X 36 & 64K X 18 SRAM Features • Asynchronous Output Enable and Power Down Inputs • 32K x 36 or 64K x 18 Organizations • 0.45 Micron CMOS Technology • Synchronous Flow Thru Mode Of Operation with Self-Timed Late Write

Contextual Info: IBM11D4320B IBM11D8320B 4M/8M X 32 DRAM Module Features • 72-Pin JED EC Standard Single-ln-Line Memory Module • Performance: -6 0 -70 tRAC R A S A ccess Tim e 60ns 70ns tCAC C A S A ccess Tim e 15ns 20ns tAA A ccess T im e From Address 30ns 35ns ÍRC Cycle Tim e

Contextual Info: IBM11T2640HP 2M x 64 144 PIN SO DIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • Au contacts • Optimized for byte-write non-parity applications • Performance: • System Performance Benefits:

TGUI9680

Abstract: tgui96 wram
Contextual Info: TGUI9680 6.0 PRELIMINARY Electrical Specifications This section describes the specifications of the TGUI9680. The following topics are discussed: 6.1 Absolute Maximum Ratings 6.2 DC Specifications 6.3 AC Specifications 6.1 Absolute Maximum Ratings Table 6-1. Absolute Maximum Ratings

Contextual Info: IB M 1 1 S 8 3 2 5 H P 8M x 32 SO DIMM Module Features • 72-Pin Small Outline Dual-ln-Line Memory Module • Performance: High Performance CMOS process Single 3.3V ± 0.3V Power Supply Low active current consumption All inputs & outputs are LVTTL 3.3V compati­

Contextual Info: IB M 1 1 D 2 3 2 5 H 2M x 32 DRAM Module Features Thin outline .104” Single 5V ± 0.5V Power Supply Low current consumption All inputs & outputs are fully TTL & CMOS compatible Extended Data Out (EDO) access cycle Refresh Modes: RAS-Only, CBR, and Hidden