TDBA Search Results

Z80SIO

Abstract: z80 mpu
Contextual Info: T O SH IB A TMPZ84C10A TM PZ84C10AP-6 / TM PZ84C10AM-6 /TMPZ84C10AT-6 CMOS-Z8O DMA : DIRECT MEMORY ACCESS CONTROLLER 1. GENERAL DESCRIPTION AND FEATURES TMPZ84C10A hereinafter referred to as DMA is th e CMOS Z80 DMA (Direct Memory Access Controller) which provides low power consum ing b u t pow erful and

817n

Abstract: RJ10 33N3
Contextual Info: Si p € /i ' Corporata! ▼ SP8530 SIG N A L PR O C E S S IN G E X C EL LE N C E S2ADC - Simultaneous Sampling Analog to Digital Converter • ■ ■ ■ ■ ■ Simultaneous Sampling of 2 channels 12 Bit Resolution Single +5Volt Supply Internal Reference

Contextual Info: TLK2218 www.ti.com SLLS734 – FEBRUARY 2007 8-PORT GIGABIT ETHERNET TRANSCEIVER FEATURES • • • • • • • • • • • Eight 1.0- to 1.3-Gigabits Per Second Gbps Synchronizable Transceivers Haft-Rate Operation (0.5 to 0.65 Gbps) Low Power Consumption <1.3 W Typical at

the pin function of ic 7405

Abstract: AMZ8016-DMA
Contextual Info: 9 L 0 8 Z U IV AmZ8016 DM A T ransfe r C o ntroller DISTINCTIVE CHARACTERISTICS • • • Two independent multi-function channels Automatic loading/reloading of control parameters by each channel Optional automatic chaining of operations Channel interleave operations

Contextual Info: Am26LS38 Advanced Micro Devices Quad Differential Backplane Transceiver DISTINCTIVE CHARACTERISTICS • 10 Mb data rate ■ 0.45 V DC noise margin Driver register and receiver latch w ith register bypass mode ■ Biasing line term inations allow low voltage

Contextual Info: DMA Transfer Controller DISTINCTIVE CHARACTERISTICS • • Channel interleave operations Masked data pattern matching for search operations V ectored interrupts on selected transfer conditions Base registers for repetitive operations Tw o independent m ulti-function channels

PPC405D4

Abstract: IBM powerpc 405gp NP4GS3 PVA c17 13n07 LP1 K09 marking a00b TDA 2040 XC5 539 405GP
Contextual Info:  IBM PowerNP NP2G Network Processor Preliminary February 12, 2003  0.1 Copyright and Disclaimer  Copyright International Business Machines Corporation 2003 All Rights Reserved US Government Users Restricted Rights - Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp.

mcs 96

Abstract: DMD10 DMD15 MB86604A 112AH fujitsu "application notes" fujitsu scsi protocol d28447
Contextual Info: April 1994 – FMI Edit 3/97 Edititon 1.0 DATA SHEET MB86604A SCSI–II PROTOCOL CONTROLLER WITH SINGLE–ENDED DRIVER/RECEIVER DESCRIPTION The Fujitsu MB86604A is a single–ended transmission type SCSI–II Protocol Controller SPC with a single–ended driver/receiver. The MB86604A facilitates interface control

11-B

Abstract: DS31256 DS3134 SV54
Contextual Info: DEMO KIT AVAILABLE DS31256 Envoy 256-Channel, High-Throughput HDLC Controller www.maxim-ic.com GENERAL DESCRIPTION The DS31256 Envoy is a 256-channel HDLC controller capable of handling up to 64 T1 or E1 data streams or two T3 data streams. Each of the 16 physical ports can handle one, two, or four

Contextual Info: EL4390C EL4390C Triplt HOMHz Video Amplifier w/DC Restore F eatu res G eneral D escrip tion • 60 M Hz —3 dB bandw idth for gains of 1 to 10 The EL4390C is three wideband current-feedback amplifiers op­ timized for video performance, each with a DC restore amplifi­

dmr 42

Contextual Info: April 1994 Edition 1.0 FUJITSU DATA SHEET MB86604A SCSI-11 PROTOCOL CONTROLLER WITH SIN G LE-EN D ED DRIVER/RECEIVER DESCRIPTION The Fujitsu MB86604A is a single-ended transmission type SCSI—II Protocol Controller SPC with a single-ended driver/receiver. The MB86604A facilitates interface control

Contextual Info: Intel Ethernet Connection I217 Datasheet v2.3 Product Features  General — 10 BASE-T IEEE 802.3 specification conformance — 100 BASE-TX IEEE 802.3 specification conformance — 1000 BASE-T IEEE 802.3 specification conformance — Energy Efficient Ethernet EEE IEEE

82599EN

Contextual Info: Intel 82599 10 GbE Controller Datasheet Networking Division ND PRODUCT FEATURES General                                  Dual port 10 GbE device or Single Port device (82599EN)

dell 9400

Abstract: 10GBASE-T cable pairs pinout dell motherboard schematic nec 2501 schematic diagram offline UPS Dell 40 pin I/0 pinout honeywell TS2 water filling station circuit diagram pentium 4 honeywell pcm45
Contextual Info: Intel 82598 10 GbE Ethernet Controller Open Source Datasheet PRODUCT FEATURES General „ Serial Flash Interface „ 4-wire SPI EEPROM Interface „ Configurable LED operation for software or OEM customization of LED displays „ Protected EEPROM space for private configuration

lfe8505

Abstract: FC-618SM DATASHEET OF BJT 547 hs9016 delta lfe8505 lfe8563 Delta LFE8583 LFE8583 ph163539 YCL lfe8583 delta
Contextual Info: DM9102H Single Chip Fast Ethernet NIC Controller DAVICOM Semiconductor, Inc. DM9102H Single Chip Fast Ethernet NIC Controller DATA SHEET Final Version: DM9102H-DS-F01 February 15, 2008 Final Version: DM9102H-12-DS-F01 February 15, 2008 DM9102H Single Chip Fast Ethernet NIC Controller

hdlc

Abstract: 070C 071C DS3134
Contextual Info: Application Note 364 DS3134 Step By Step Configuration-Bridge Mode www.dalsemi.com Overview This application note describes an example of how to configure a single T1 port on the DS3134 operating in Bridge Mode. Additionally, this example describes how to construct, send, receive, and check a packet

SERVICE MANUAL tv hyundai

Abstract: SERVICE MANUAL tv TCL LABTOOL-48 cmos 4004 Intel 4001 64LQFP GMS81508 GMS81508A GMS81516 GMS81516A
Contextual Info: GMS81508A GMS81516A USER’S MANUAL Revision History Rev 2.2 Dec. 1998 Add the package dimension for 64LQFP on page 3-1, 4-1. Rev 2.1 (Nov. 1998) Operating Temperature, -10~75°C is extended to -20~85°C. Add the unused port guidance on page 55. Correct errata for opcode of “EOR [dp+X], EOR [dp]+Y, EOR {X}” in “Instruction Set”.

Contextual Info: Æ T 7 S G S -m O M S O N M @i[LI©ir[EMD gS ST9054 32K ROM HCMOS MCU WITH BANKSWITCH AND A/D CONVERTER ADVANCE DATA • Single chip microcontroller with 32K bytes of ROM, 1,280 bytes of static RAM and 256 bytes of register file with 224 general purpose registers

ST9030

Contextual Info: SGS-THOMSON # !MMg i[Li *MO(g§ ST9040 16K ROM HCMOS MCU WITH EEPROM, RAM AND A/D • Single chip m icrocontroller with 16K bytes of ROM, 256 bytes of RAM and 256 bytes of register file with 224 general purpose registers available as RAM, accum ulators or index pointers.

ST90R91

Abstract: st90r9
Contextual Info: SGS-THOMSON ¡y ST90R91 ROMLESS HCMOS MCU WITH BANKSWITCH _ AND A/D CONVERTER PRELIMINARY DATA Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time : 500ns 12MHz internal ROMIess to allow maximum external memory

Contextual Info: S G S- THOMSON 42E D Bl TTETSB? 0034456 4 B ISSTH r z j s g s - h io m s o ^ ^ 7 # » ^ n ^ © I ( L i© ¥ K C Q ( ^ 0 ( g i S T 9 0 R 4 0 ROMLESS HCMOS MCU WITH EEPROM, RAM AND A/D ADVANCE DATA • Single chip microcontroller with 256 bytes of RAM and 256 bytes of Register File with 224

Contextual Info: r z r j S G S -T H O M S O N ^ 7 # ST90R40 M g ^ (Ô i[L i ïïïiM O (g S ROMLESS HCMOS MCU WITH EEPROM, RAM AND A/D ADVANCE DATA • Single chip m icrocontroller with 256 bytes of RAM and 256 bytes of Register File w ith 224 general purpose registers available as RAM, ac­

Contextual Info: SGS-THOMSON ST90E27/T27 ST90E28/T28 M S ^ ( g [l^ ( O T ® iQ S 16K EPROM HCMOS MCUs WITH RAM Register oriented 8/16 bit CORE with RUN, WFI and HALT modes Minimum instruction cycle time: 500ns (12MHz internal) Internal M em ory: EPROM 16Kbytes RAM

VC5471

Contextual Info: TMS320VC5471 Fixed-Point Digital Signal Processor Data Manual Literature Number: SPRS180C June 2001 – Revised December 2002 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments