TDH1 Search Results

ir 0948

Contextual Info: Driver Transformers •4- .750 4 .660 t □ 11 11 1! II fj I -*j 1-4- .8 5 0 - ► 1 Tififr I ►j .515 I-4 -.2 0 0 -4—.850 — 4 .830 II II U II LJ Features t- -i TDH187 •Core:EI187 • Ae 0.228 • le 4.01 • AW 0.316 .1 7 5 4 TDH2425 • Core: El 2425

Contextual Info: bq4011/bq4011Y 32Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4011 is a nonvolatile 262,144-bit static RAM organized as 32,768 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

UNITRODE

Contextual Info: bq4014/bq4014Y 256Kx8 Nonvolatile SRAM Features ➤ Data retention in the absence of power ➤ Automatic write-protection during power-up/power-down cycles ➤ Industry-standard 32-pin 256K x 8 pinout ➤ Conventional SRAM operation; unlimited write cycles

Contextual Info: bq4011/bq4011Y 32Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4011 is a nonvolatile 262,144-bit static RAM organized as 32,768 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

Contextual Info: bq4010/bq4010Y 8Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4010 is a nonvolatile 65,536-bit static RAM organized as 8,192 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

bq4010

Abstract: bq4010LY bq4010MA-150 bq4010MA-200 bq4010MA-70 bq4010MA-85 bq4010Y
Contextual Info: Not Recommended For New Designs bq4010/Y/LY www.ti.com SLUS116A – MAY 1999 – REVISED JUNE 2007 8 k x 8 NONVOLATILE SRAM 5 V, 3.3 V FEATURES • • • • • • GENERAL DESCRIPTION Data Retention for at least 10 Years Without Power Automatic Write-Protection During

T4 1060

Abstract: SST29EE512-70-4I-NHE 32-PIN SST29EE512
Contextual Info: 512 Kbit 64K x8 Page-Write EEPROM SST29EE512 SST29EE512512Kb (x8) Page-Write, Small-Sector flash memories Data Sheet FEATURES: • Single Voltage Read and Write Operations – 4.5-5.5V for SST29EE512 • Superior Reliability – Endurance: 100,000 Cycles (typical)

NT5TU32M16AG-37B

Abstract: NT5TU128M4AE nt5tu64m8 nt5tu64m NT5TU32M16 NT5T nt5tu32m16ag nt5tu64m8af
Contextual Info: NT5TU128M4AB/NT5TU128M4AE Green NT5TU64M8AF/NT5TU64M8AB/NT5TU64M8AE(Green) ) 512Mb DDR2 SDRAM Features • Write Latency = Read Latency -1 CAS Latency and Frequency • Programmable Burst Length: 4 and 8

SST39LF512

Abstract: SST39LF010 SST39LF020 SST39LF040 SST39VF010 SST39VF020 SST39VF040 SST39VF512
Contextual Info: 512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit x8 Multi-Purpose Flash SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040 SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040 SST39LF/VF512 / 010 / 020 / 0403.0 & 2.7V 512Kb / 1Mb / 2Mb / 4Mb (x8) MPF memories Data Sheet

Contextual Info: bq4852Y RTC Module With 512Kx8 NVSRAM Features General Description ➤ Integrated SRAM, real-time clock, CPU supervisor, crystal, power-fail control circuit, and battery The bq4852Y RTC Module is a nonvolatile 4,194,304-bit SRAM organized as 524,288 words by 8 bits with

Contextual Info: bq4010/bq4010Y 8Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4010 is a nonvolatile 65,536-bit static RAM organized as 8,192 words by 8 bits. The integral control circuitry and lithium energy source provide reliable nonvolatility

10ST10

Abstract: lq55
Contextual Info: Ordering n u m b e r:EN4794B CMOS LSI LC3564S, SS, SM, ST-70/85/10 64K 8192wordsX8 bits SRAM Overview The LC3564S, LC3564SS, LC3564SM, and LC3564ST are asynchronous silicon gate CMOS static RAMs with an 8192-word X 8-bit organization. These SRAMs are full CMOS type

SS 1091

Abstract: SED1510F0C LCD ALPHANUMERIC DISPLAY 1091
Contextual Info: SED1510 CMOS SEGMENT-TYPE LCD CONTROLLER DRIVER • Serial Data Interface • Built-in Display data RAM • 4 COM Driver Output and 32 SEG Driver Output • DESCRIPTION The SED1510 is an intelligent CMOS LCD driver-controller for segment type liquid crystal display with the

DS1250

Abstract: DS1250AB DS1250AB-100 DS1250AB-70 DS1250Y DS1250Y-100 DS1250Y-70 DS9034PC
Contextual Info: DS1250Y/AB 4096k Nonvolatile SRAM www.maxim-ic.com FEATURES § § § § § § § § § § § § PIN ASSIGNMENT 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Replaces 512k x 8 volatile static RAM,

TAG 8926

Abstract: Lpg 899 SDC 2921 TF 6221 HEN LED display 12V+RELAY+1+C/8 pin ic sdc 3733
Contextual Info: MCIMX31 and MCIMX31L Multimedia Applications Processors Reference Manual MCIMX31RM Rev. 1 2/2006 How to Reach Us: USA/Europe/Locations Not Listed: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-521-6274 or 480-768-2130

Contextual Info: bq4010/Y/LY www.ti.com SLUS116A – MAY 1999 – REVISED JUNE 2007 8 k x 8 NONVOLATILE SRAM 5 V, 3.3 V FEATURES • • • • • • GENERAL DESCRIPTION Data Retention for at least 10 Years Without Power Automatic Write-Protection During Power-up/Power-down Cycles

Contextual Info: bq4013/Y/LY www.ti.com SLUS121A – MAY 1999 – REVISED MAY 2007 128 k x 8 NONVOLATILE SRAM 5 V, 3.3 V FEATURES • • • • • • GENERAL DESCRIPTION Data Retention for at least 10 Years Without Power Automatic Write-Protection During Power-up/Power-down Cycles

Contextual Info: bq4014/bq4014Y 256Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4014 is a nonvolatile 2,097,152-bit static RAM organized as 262,144 words by 8 bits. The integral control circuitry and lithium energy

M34D64

Abstract: M34D64-R M34D64-W
Contextual Info: M34D64 64 Kbit Serial I²C Bus EEPROM With Hardware Write Control on Top Quarter of Memory FEATURES SUMMARY 2 • Two Wire I C Serial Interface Supports 400 kHz Protocol ■ Figure 1. Packages Single Supply Voltage: – 2.5V to 5.5V for M34D64-W – 1.8V to 5.5V for M34D64-R

DS1245V

Abstract: 32-PIN 34-PIN DS1245 DS1245AB DS1245Y DS1243AB-100
Contextual Info: D S 1245Y /A B DALLAS s e m ic o n d u c t o r DS1245Y/AB 1024K Nonvolatile SRAM FEATURES PIN ASSIGNM ENT * 1 0 years minimum data retention in the absence of external power 1 1 NC A16 • Data is automatically protected during power loss Í A14 • Dl P-package devices directly replace 128K x 8 vola­

34-PIN

Abstract: DS1345 DS1345W DS9034PC
Contextual Info: DS1345W PRELIMINARY •»Ai g j i c U A L L A O s e m ic o n d u c to r FEATURES DS1345W 3.3V 1024K Nonvolatile SRAM with Battery Monitor PIN ASSIGNMENT • 10 years m inim um data retention in the absence of external power NC NC A14 A13 A12 A11 A10 A9 A8

bq4014

Abstract: BQ4014MB-120 BQ4014MB-85 bq4014Y BQ4014YMB-85
Contextual Info: bq4014/bq4014Y 256Kx8 Nonvolatile SRAM Features General Description ➤ Data retention in the absence of power The CMOS bq4014 is a nonvolatile 2,097,152-bit static RAM organized as 262,144 words by 8 bits. The integral control circuitry and lithium energy

Contextual Info: A J • ■ HY62256A H Y U N o n i m x M lt CMOS SRAM s e m ic o n d u c t o r M241201B-APR91 DESCRIPTION FEATURES The HY62256A is a high speed low power, 32,768 words by 8-bit CMOS static RAM fabricated using HYUNDAI’S high perfor­ m ance twin tub CM OS process. This high

Contextual Info: INTEGRATE] DEVICE bbE J> m 4A25771 GG12414 Ì7D « I D T VERY LOW POWER 3.3V CMOS FAST SRAM 256k 32k X 8-BIT) ADVANCE INFORMATION IDT713256SL Integrated Device Technology, Inc. FEATURES • Ideal for 16/32-bit notebook/sub-notebook cache at 20,25, and 33MHz, and for other battery-operated equipment