TDQ3 Search Results

4013 n

Contextual Info: TEKELEC böE C O MP O N EN T S D TDQ37fl7 GGaom5 DST DOUBLE BALANCED MIXERS ✓ Package Type Model n' F 56 662 Flat Pack BMH 160 TO 4013 TO 8 TO 8 -1 4 4 Frequency ran ge RF LO 0,5 - 500 MHz IF DC - 500 MHz LO Level 7 dBm T em perature range - 5 5 / 100°C

THMY25E10C70

Contextual Info: TOSHIBA THMY25E10C70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 33,554,432-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY25E10C is a 33,554,432-word by 72-bit synchronous dynamic RAM module consisting of nine TC59SM808CFT DRAMs and PLL/Registers on a printed circuit board.

58A040F

Contextual Info: 1— Hardware ISD-T266SC HARDWARE MICROWIRE Serial Interface Figure 1-1. Block Diagram PIN ASSIGNMENT Pin— Signal Assignment The following sections detail the pins of the Table 1-1 shows all the pins, and the signals that ISD-T266SC use them in different configurations. It also shows

Contextual Info: MOTOROLA Order this document by MPC27T416/D SEMICONDUCTOR TECHNICAL DATA Advance Information MPC27T416 16K x 16 Bit Cache Tag RAM for PowerPC Processors The MPC27T416 is a 262,144 bit cache–tag static RAM designed to support PowerPC microprocessors at bus speeds up to 66 MHz. It is organized as 16K

q3236i

Abstract: tfk - 843 tfk 811 s TFK 834 S/BIP/SCB345100/B/30/10/ferrite ei core 33A
Contextual Info: Q3236 PHASE-LOCKED LOOP FREQUENCY SYNTHESIZER FEATURES • Reference Division Ratios of 1 to 16 in Direct • Backwards Compatible w ith the Q3036 and Parallel Mode, or 1 to 64 in Serial and 8 -bit Bus Mode Q3216 PLL Chips • Phase N oise Contributions as Low as

Contextual Info: * r z z 7/. S G S -T H O M S O N S T H 221 M U L D E X IC FO R M U L T IM E D IA T E L E S E R V IC E S • HCMOS SEA OF GATE TECHNOLOGY ■ 64 PINS QUAD FLAT PACKAGE ■ TWO MODES OF OPERATION: STAND­ ALONE, MICROPROCESSOR ■ INTERFACE FOR 8/16/32 BIT MICROPRO­

Contextual Info: ADVANCE M im a N I i i i - . i - i i - j i 'v MT3LST3264 P , MT5LST6464(P) 32K, 64K x 64 SYNCHRONOUS SRAM MODULE 32K, 64K x 64 SRAM SYNCHRONOUS SRAM MODULE with Tag RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES

qualcomm IQ demodulator

Abstract: Q5500 qualcomm qualcomm IQ Qualcomm, MSM qualcomm cdma processor schematic G4 ASIC AL 360 051863 qualcomm RF device specification
Contextual Info: Q5500 IF RECEIVE AGC AMPLIFIER/ Q5505 IF TRANSMIT AGC AMPLIFIER FEATURES Q5500 FEATURES GENERAL DESCRIPTION The Q5500 Receive Rx and Q5505 Transmit (Tx) • Supports Dual Mode Operation Variable Gain Amplifiers (VGA) are designed specifically • Single +3.6 V Power Supply

Contextual Info: MITSUBISHI LSIs MH32S72BAFA -7,-8 2,415,919,104-BIT 33,554,432-WORD BY 72-BIT Synchronous DYNAMIC RAM DESCRIPTION The MH32S72BAFA is 33554432 - word x 72-bit Synchronous DRAM stacked structural module. This consist of thirty-six industry standard 16M x 4 Synchronous

tdq4

Contextual Info: MOTOROLA • SEMICONDUCTOR TECHNICAL DATA Advance Information 128KB/256KB/512KB Secondary Cache Module MCM32AB32 MCM32AB64 MCM32AB128 With Tag, Valid, and Dirty for 486 Processor Based Systems The MCM32AB32SG, MCM32AB64SG, and MCM32AB128 are a family of Motorola’s asynchronous secondary cache modules for the 486 processor. This family

TAG C2 255 800

Abstract: 51 TAG MPC27T416TQ10 TAG circuitry MPC27T416 MPC27T416TQ12 MPC27T416TQ9 semi active tag
Contextual Info: MOTOROLA Order this document by MPC27T416/D SEMICONDUCTOR TECHNICAL DATA Advance Information MPC27T416 16K x 16 Bit Cache Tag RAM for PowerPC Processors The MPC27T416 is a 262,144 bit cache–tag static RAM designed to support PowerPC microprocessors at bus speeds up to 66 MHz. It is organized as 16K

R4000

Abstract: Nippon capacitors
Contextual Info: MOTOROLA Order this document by MCM44256/D SEMICONDUCTOR TECHNICAL DATA 4MB R4000 Secondary Cache Fast Static RAM Module Set Four MCM44256 modules comprise a full 4 MB of secondary cache for the R4000 processor. Each module contains nine MCM6729WJ fast static RAMs for

T3264

Contextual Info: ADVANCE MICRON I TECHN OLO GY, INC. MT3LST3 26 4 P , MT 3 L ST 6 4 6 4 ( P ) 32K/ 64K X 64 S Y N C H R O N O U S SRAM M O D U L E S S YN C H R O N O U S SRAM MODULE 3 2 K / 6 4 K x 64 S R A M with Tag RAM 256KB/512KB, 3.3V, FLOW -THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE

GHW Connectors

Abstract: TDQ38 BTA60 bta61 bta80 bta11 BTA100 BTA32 bta50 bta81
Contextual Info: Version 1.2 December 1999 2975 Stender Way, Santa Clara, California 95054 Telephone: 800 345-7015 • TWX: 910-338-2070 • FAX: (408) 492-8674 Printed in U.S.A. 1999 Integrated Device Technology, Inc. Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance

Contextual Info: ADVANCE V / lir^ c a rn fS J I MT3LST3264(P , MT3LST6464(P) 32K/64K x 64 SYNCHRONOUS SRAM MODULES 32K/64K x 64 SRAM SYNCHRONOUS SRAM MODULE with Tag RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT (Front View)

MT3LST3264PG

Contextual Info: ADVANCE M IC R O N I MT3LST3264 P , MT5LST6464(P) 32K, 64K x 64 SYNCHRONOUS SRAM MODULE 32K, 64K x 64 SRAM SYNCHRONOUS SRAM MODULE with Tag R A M 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN A SSIG N M EN T (Front View)

Intel 82420

Abstract: tag 87 MCM32A732 MCM32A764 MCM32A832 MCM32A864 MCM32A932 MCM32A964 Nippon capacitors
Contextual Info: MOTOROLA Order this document by MCM32A732/D SEMICONDUCTOR TECHNICAL DATA Advance Information 128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems This family of cache modules is well suited to provide the secondary cache for

Contextual Info: ADVANCE U II^ C a n iM ni — 1 MT3LST3264 P , MT5LST6464(P) 32K, 64K x 64 SYNCHRONOUS SRAM MODULE 32K, 64K x 64 SRAM with TAG RAM 256KB/512KB, 3.3V, FLOW-THROUGH OR PIPELINED SYNCHRONOUS BURST, SECONDARY CACHE MODULES FEATURES PIN ASSIGNMENT (Front View)

88E1119R

Abstract: 88E1119 smd transistor M21 AA7 smd diode w18 smd transistor smd transistor F21 w21 transistor smd SOT W17 SMD transistor MT41J64M16JT-15E SMD Transistor Y13
Contextual Info:  LatticeECP3 Versa Evaluation Board User’s Guide August 2012 Revision: EB62_01.5  LatticeECP3 Versa Evaluation Board User’s Guide Introduction The LatticeECP3 Versa Evaluation Board allows designers to investigate and experiment with the features of the

88E1119R

Abstract: 88E1119 AA7 smd diode smd transistor M21 LFE3-35E-FN484CES MT41J64M16JT-15E smd transistor w18 W17 smd package transistor w18 smd transistor SMD Transistor Y13
Contextual Info:  LatticeECP3 Versa Evaluation Board User’s Guide February 2012 Revision: EB62_01.4  LatticeECP3 Versa Evaluation Board User’s Guide Introduction The LatticeECP3 Versa Evaluation Board allows designers to investigate and experiment with the features of the

51 TAG

Abstract: TAG circuitry MPC27T415 IDT71216 MPC27T415TQ10 MPC27T415TQ12 MPC27T415TQ9
Contextual Info: MOTOROLA Order this document by MPC27T415/D SEMICONDUCTOR TECHNICAL DATA Advance Information MPC27T415 16K x 15 Bit Cache Tag RAM for PowerPC Processors The MPC27T415 is a 245,760 bit cache–tag static RAM designed to support PowerPC microprocessors at bus speeds up to 66 MHz. It is organized as 16K

VSD17

Abstract: VSD17 drive CL-PX2080 PX2080 HS 1106 BS DOD14 GSD4 BPE 62 RAMDAC vfc ldwz
Contextual Info: CIRRUS LOGIC INC/ PIXEL b5E D B RDDBBbM Q0QQ17R 27b M P I X L CL-PX2080 Pixel Semiconductor Preliminary Data Book A Cirrus Logic Company FEATURES • Mixes graphics and video in real time ■ Supports multiple, occluded video windows ■ Pixel-clock rates up to 85 MHz

Contextual Info: Q2334 DUAL DIRECT DIGITAL SYNTHESIZER i» "4: ‘ ^ Z ^ Y L S I P ro d u c ts T0D333t. OOOQSTE Mil / j-Â'.'i- C O NTENTS NRC Enable. 14 Accumulator Reset Register O the r Q U ALC O M M VISI Products FEATURES. 4

burndy 8 pin CONNECTOR

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 256KB Secondary Cache Module With Tag and Optional Dirty for 486 Processor Systems These 256K Byte cache modules offer dual asynchronous 32K x 32 banks of memory. There is a 16K x 8 tag memory for main memory ca cheability up to 64