TENS D3 Search Results

DYMEC 5024

Abstract: how timer 5024
Contextual Info: MODEL: 5024 24-Bit Programmable Counter/Timer time base. The time base can range from hundreds of nanoseconds to tens of seconds, with specific time values depending upon the frequency of a timing reference. The timing reference for the counter/timer may be either a

MS2735

Abstract: M85049 STRAIN RELIEF ASSEMBLY INSTRUCTIONS 620HS MS2750 M83723/60-1 770-006 M85049/18 ASSEMBLY INSTRUCTIONS
Contextual Info: TH E WORLD ' S M OST COM P L ETE SE LE C TI ON OF M I L -SP EC BACKSHELLS AND CO N NE C T O R AC C E SS O RIES—F ROM AS850 49 TO MIL -DTL -38 9 9 9 NOVEMBER 2013 QUALIFIED MIL-SPEC Connector Backshells and Accessories Tens of thousands of parts in-stock

L213N

Abstract: HEF4534B
Contextual Info: HEF4534B LSI REAL TIME 5-DECADE COUNTER The HEF4534B is a 5-decade ripple counter. The binary outputs of the decade counters are timemultiplexed by an internal scanner on four BCD outputs Oq to O 3 . The selected decade is indicated by a logic H IG H on the appropriate digit select output (OS q : units, 1; O S ): tens, 10; OS 2 : hundreds,

UPD4991C

Abstract: D4991 UPD4991g PD4991 ic last digit of year
Contextual Info: v ¿¿PD4991 4 -B IT S P A R A L L E L I/O R EA L T IM E C L O C K R T C DESCRIPTION The /iPD4991 is CMOS integrated circuit designed for microcomputer systems which require real time clock, alarm timer and interval timer functions. Reference frequency of the ¿¿PD4991 is 32.768 kHz.

Contextual Info: MITSUBISHI <DIGITAL ASSP> M66850J/FP, M66851J/FP M66852J/FP, M66853J/FP SRAM TYPE FIFO MEMORY 31 D7 30 D8 1 D5 32 D6 5 29 RS D0 6 28 WEN1 PAF 7 27 WCLK PAE 8 26 WEN2/LD GND 9 25 VCC Q4 20 Q3 19 21 Q5 Q2 18 22 Q6 OE 13 Q1 17 REN2 12 Q0 16 23 Q7 FF 15 24 Q8

CY7C4255

Abstract: CY7C4265 CY7C42X5 only-10
Contextual Info: fax id: 5413 1CY 7C42 65 CY7C4255 CY7C4265 PRELIMINARY 8K/16Kx18 Deep Sync FIFOs Features are 18 bits wide and are pin/functionally compatible to the CY7C42X5 Synchronous FIFO family. The CY7C4255/65 can be cascaded to increase FIFO depth. Programmable features

CY7C4255-15AC

Abstract: CY7C4255 CY7C4265 CY7C42X5 D4255-1 CY7C4265-15AI d1668
Contextual Info: CY7C4255 CY7C4265 PRELIMINARY 8K/16K x 18 Synchronous FIFOs Features D D D 8K x 18 CY7C4255 D PinĆcompatible density upgrade to CY7C42X5 family D PinĆcompatible density upgrade to IDT72205/15/25/35/45 D Additional features The CY7C4255/65 are highĆspeed, lowĆ

800H

Abstract: M2400 Z1000 nel d32 - 45
Contextual Info: Uscita analogica M2400 Sistema Lightbus II/O Beckhoff M2400 Uscita analogica Descrizione tecnica Eiserstraße 5 Telefon 05246/963-0 33415 Verl Telefax 05246/963-149 Data : 12.7.95 Versione: 2.0 pagina 1 di 15 M2400 Uscita analogica Sistema Lightbus II/O Beckhoff

FQ221

Contextual Info: FQ251 • FQ241 · FQ231 · FQ221 · FQ211 · FQ201 · FQ421· FQ321 FlexQTMI 5 Volt Synchronous x9 First-In/First-Out Queue Memory Configuration Device 8,192 x 9 FQ251 Memory Configuration 512 x 9 Device FQ211 4,096 x 9 FQ241 256 x 9 FQ201 2,048 x 9 FQ231

CY7C4281V

Abstract: CY7C4291V CY7C42X1V
Contextual Info: fax id: 5423 CY7C4281V CY7C4291V PRELIMINARY 64K/128Kx9 Low Voltage Deep Sync FIFOs Features • Pin-compatible 3.3V solutions for CY7C4281/91 • 3.3V operation for low power consumption and easy integration into low voltage systems • High-speed, low-power, first-in first-out FIFO

Contextual Info: CY7C4261V CY7C4271V PRELIMINARY 16Kx9 Low Voltage Deep Sync FIFO Speed ns 15 25 Ordering Code Package Name Package Type Operating Range CY7C4261V-15JC J65 32-Lead Plastic Leaded Chip Carrier Commercial CY7C4261V-15JI J65 32-Lead Plastic Leaded Chip Carrier

CY7C4281

Abstract: CY7C4291
Contextual Info: fax id: 5415 Back PRELIMINARY CY7C4281 CY7C4291 64K/128Kx9 Deep Sync FIFOs Features • Pin-compatible density upgrade to IDT72201/11/21/31/41/51 • High-speed, low-power, first-in first-out FIFO memories • 64k x 9 (CY7C4281) • 128k x 9 (CY7C4291) • 0.5 micron CMOS for optimum speed/power

FQV241-6

Abstract: FQV251-6
Contextual Info: FQV251 • FQV241 · FQV231 · FQV221 · FQV211 · FQV201 · FQV421· FQV321 FlexQTMI 3.3 Volt Synchronous x9 First-In/First-Out Queue Memory Configuration Device Memory Configuration Device 8,192 x 9 FQV251 512 x 9 FQV211 4,096 x 9 FQV241 256 x 9 FQV201 2,048 x 9

CY7C4255V

Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V
Contextual Info: fax id: 5422 CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V PRELIMINARY 8K/16K/32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to

Contextual Info: CY7C4275 CY7C428532K/64Kx18 Deep Sync FIFOs 1CY7C4285 CY7C4275 CY7C4285 32K/64Kx18 Deep Sync FIFOs Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 32K x 18 (CY7C4275) • 64K x 18 (CY7C4285) • 0.5 micron CMOS for optimum speed/power

CY7C4255V

Abstract: CY7C4265V CY7C4275V CY7C4285V CY7C42X5V CY7C42X5V-ASC
Contextual Info: CY7C4255V/CY7C4265V CY7C4275V/CY7C4285V 32K/64Kx18 Low Voltage Deep Sync FIFOs Features Functional Description The CY7C4255/65/75/85V are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to

CY7C4275

Abstract: CY7C4285 CY7C42X5
Contextual Info: 285 CY7C4275 CY7C4285 32K/64Kx18 Deep Sync FIFOs Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 32K x 18 (CY7C4275) • 64K x 18 (CY7C4285) • 0.5 micron CMOS for optimum speed/power • High-speed 100-MHz operation (10-ns read/write cycle

CY7C4275

Abstract: CY7C4285 CY7C42X5 CY7C4285-15ASC 42756
Contextual Info: CY7C4275 CY7C4285 PRELIMINARY 32K/64Kx18 Deep Sync FIFOs Features Functional Description The CY7C4275/85 are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to the

Contextual Info: CY7C4255V CY7C4265V PRELIMINARY 8K/16Kx18 Low Voltage Deep Sync FIFOs Features Functional Description • 3.3V operation for low power consumption and easy integration into low voltage systems • High-speed, low-power, first-in first-out FIFO memories • 8K x 18 (CY7C4255V)

CY7C4281

Abstract: CY7C4291 CY4291
Contextual Info: 291 CY7C4281 CY7C4291 PRELIMINARY 64K/128Kx9 Deep Sync FIFOs Features • Pin-compatible density upgrade to IDT72201/11/21/31/41/51 • High-speed, low-power, first-in first-out FIFO memories • 64k x 9 (CY7C4281) • 128k x 9 (CY7C4291) • 0.5 micron CMOS for optimum speed/power

CY7C4291-10JC

Abstract: CY7C4281 CY7C4291
Contextual Info: fax id: 5415 CY7C4281 CY7C4291 PRELIMINARY 64K/128Kx9 Deep Sync FIFOs Features • Pin-compatible density upgrade to IDT72201/11/21/31/41/51 • High-speed, low-power, first-in first-out FIFO memories • 64k x 9 (CY7C4281) • 128k x 9 (CY7C4291) • 0.5 micron CMOS for optimum speed/power

CY7C4255

Abstract: CY7C4265 CY7C42X5
Contextual Info: CY7C4255 CY7C4265 8K/16K x 18 Deep Sync FIFOs Features are 18 bits wide and are pin/functionally compatible to the CY7C42X5 Synchronous FIFO family. The CY7C4255/65 can be cascaded to increase FIFO depth. Programmable features include Almost Full/Almost Empty flags. These FIFOs provide

Contextual Info: CY7C4265 16 K x 18 Deep Sync FIFOs Functional Description Features • High speed, low power, first-in first-out FIFO memories ❐ 16 K × 18 (CY7C4265) ■ 0.5 micron CMOS for optimum speed and power ■ High speed 100 MHz operation (10 ns read/write cycle times)

TS 4142

Abstract: metal case REGULATOR IC 7812 pin diagram CY7C4275 CY7C4285 CY7C42X5 rs447
Contextual Info: fax id: 5416 CY7C4275 CY7C4285 PRELIMINARY 32K/64Kx18 Deep Sync FIFOs Features Functional Description The CY7C4275/85 are high-speed, low-power, first-in first-out FIFO memories with clocked read and write interfaces. All are 18 bits wide and are pin/functionally compatible to the