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    TFR2M Search Results

    TFR2M Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    TFR2M Unknown Shortform Data and Cross References (Misc Datasheets) Short Form PDF

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    Catalog Datasheet MFG & Type PDF Document Tags

    ZL50011QCG1

    Abstract: GR-1244-CORE MS-026 ZL50011
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • March 2006 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information 160 Pin LQFP Trays 144 Ball LBGA Trays 160 Pin LQFP* Trays, Bake & Drypack


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    PDF ZL50011 ZL50011/QCC ZL50011/GDC ZL50011QCG1 ZL50011GDG2 GR-1244-CORE ZL50011QCG1 MS-026 ZL50011

    ZL50010

    Abstract: TFR1M GR-1244-CORE MS-026
    Text: ZL50010 Flexible 512-ch DX with Enhanced DPLL Data Sheet Features VDD ZL50010/QCC ZL50010/GDC • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15


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    PDF ZL50010 512-ch STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 ZL50010 TFR1M GR-1244-CORE MS-026

    GR-1244-CORE

    Abstract: MS-026 ZL50011 11CH marking
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


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    PDF ZL50011 GR-1244-CORE MS-026 ZL50011 11CH marking

    GR-1244-CORE

    Abstract: MS-026 ZL50010
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay


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    PDF ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 GR-1244-CORE MS-026 ZL50010

    ZL50010QCG1

    Abstract: GR-1244-CORE MS-026 ZL50010 32CH1
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15 FPo0 CKo0


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    PDF ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC ZL50010QCG1 ZL50010GDG2 ZL50010QCG1 GR-1244-CORE MS-026 ZL50010 32CH1

    GR-1244-CORE

    Abstract: MS-026 ZL50010 TFPW0
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay


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    PDF ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 GR-1244-CORE MS-026 ZL50010 TFPW0

    MO-151

    Abstract: MT90866 MT90866AG ST012 lidr-9
    Text: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features October 2003 • 2,432 x 2,432 non-blocking switching among local streams • 4,096 x 2,432 blocking switching between backplane and local streams • 2,048 x 2,048 non-blocking switching among


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    PDF MT90866 192Mb/s 384Mb/s 048Mb/s, 096Mb/s 192Mb/s MT90866AG MO-151 MT90866 ST012 lidr-9

    Untitled

    Abstract: No abstract text available
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


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    PDF ZL50011 GR-1244-CORE

    002E

    Abstract: No abstract text available
    Text: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features • • • • • • • • • • • • • • • • • • • • • • • • December 2002 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between


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    PDF MT90866 192Mb/s 384Mb/s 048Mb/s, 096Mb/s 048Mb/s 002E

    FOX 20.000 MHZ

    Abstract: LMT 324 slv ca2 GR-1244-CORE MS-026 ZL50010 STO14 tfk8k
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD Per-stream output channel and output bit delay programming with fractional bit advancement Multiple frame pulse outputs and reference clock outputs Per-channel constant throughput delay


    Original
    PDF ZL50010 STi0-15 ZL50010/QCC ZL50010/GDC IEEE-1149 FOX 20.000 MHZ LMT 324 slv ca2 GR-1244-CORE MS-026 ZL50010 STO14 tfk8k

    lidr-9

    Abstract: MO-151 MT90866 MT90866AG MT90866AG2 ST012 G7-G14
    Text: MT90866 Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch Data Sheet Features September 2005 • 2,432 x 2,432 non-blocking switching among local streams • 4,096 x 2,432 blocking switching between backplane and local streams


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    PDF MT90866 lidr-9 MO-151 MT90866 MT90866AG MT90866AG2 ST012 G7-G14

    LG01

    Abstract: ZL50030 ZL50030GAC
    Text: ZL50030 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch Data Sheet Features February 2005 • 4,096 x 2,048 blocking switching between backplane and local streams • 1,024 x 1,024 non-blocking switching between local streams


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    PDF ZL50030 ZL50030GAC LG01 ZL50030 ZL50030GAC

    GR-1244-CORE

    Abstract: MS-026 ZL50011
    Text: ZL50011 Flexible 512-ch DX with on-chip DPLL Data Sheet Features VDD • • • Applications • • • • • Small and medium digital switching platforms Access Servers Time Division Multiplexers Computer Telephony Integration Digital Loop Carriers VSS


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    PDF ZL50011 512-ch STi0-15 GR-1244-CORE MS-026 ZL50011

    LG01

    Abstract: ZL50031 ZL50031QEG1
    Text: ZL50031 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch Data Sheet Features February 2005 • 4,096 x 2,048 blocking switching between backplane and local streams • 2,048 x 2,048 non-blocking switching between local streams


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    PDF ZL50031 ZL50031QEG1 LG01 ZL50031

    tfk8k

    Abstract: lg1001 LID17
    Text: MT90866 WAN Access Switch Preliminary Information Features • • • • • • • • • • • • • • • • • • • • • • • • 3.3V operation with 5V tolerant inputs and I/O’s 5V tolerant PCI driver on CT-Bus I/O’s 2,432 x 2,432 non-blocking switching among local


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    PDF MT90866 192Mb/s 384Mb/s 048Mb/s, 096Mb/s 048Mb/s tfk8k lg1001 LID17

    32.768Mhz oscillator

    Abstract: FOX 20.000 MHZ GR-1244-CORE MS-026 ZL50011 tfk8
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


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    PDF ZL50011 GR-1244-CORE 32.768Mhz oscillator FOX 20.000 MHZ MS-026 ZL50011 tfk8

    lidr-9

    Abstract: CH254 MO-151 MT90866 MT90866AG MT90866AG2 ST012 dom2 ZL50031
    Text: MT90866 Flexible 4 K x 2.4 K Channel Digital Switch with H.110 Interface and 2.4 K x 2.4 K Local Switch Data Sheet Features January 2006 • 2,432 x 2,432 non-blocking switching among local streams • 4,096 x 2,432 blocking switching between backplane and local streams


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    PDF MT90866 lidr-9 CH254 MO-151 MT90866 MT90866AG MT90866AG2 ST012 dom2 ZL50031

    Untitled

    Abstract: No abstract text available
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features • September 2011 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation Ordering Information ZL50011/GDC 144 Ball LBGA Trays ZL50011QCG1 160 Pin LQFP* Trays, Bake & Drypack


    Original
    PDF ZL50011 ZL50011/GDC ZL50011QCG1 ZL50011GDG2 GR-1244-CORE

    Untitled

    Abstract: No abstract text available
    Text: ZL50010 Flexible 512 Channel DX with Enhanced DPLL Data Sheet Features VDD • • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15 FPo0 CKo0


    Original
    PDF ZL50010 STi0-15 ZL50010/GDC ZL50010QCG1 ZL50010GDG2

    LG01

    Abstract: ZL50031 ZL50031QEG1 lg1001
    Text: ZL50031 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch Data Sheet Features February 2005 • 4,096 x 2,048 blocking switching between backplane and local streams • 2,048 x 2,048 non-blocking switching between local streams


    Original
    PDF ZL50031 ZL50031QEG1 LG01 ZL50031 lg1001

    GR-1244-CORE

    Abstract: MS-026 ZL50011
    Text: ZL50011 Flexible 512 Channel DX with on-chip DPLL Data Sheet Features December 2003 • 512 channel x 512 channel non-blocking switch at 2.048 Mbps, 4.096 Mbps or 8.192 Mbps operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Integrated Digital Phase-Locked Loop DPLL


    Original
    PDF ZL50011 GR-1244-CORE MS-026 ZL50011

    VME backplane pinout

    Abstract: No abstract text available
    Text: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features • • • • • • • • • • • • • • • • • • • • • • • • December 2002 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between


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    PDF MT90866 192Mb/s 384Mb/s 048Mb/s, 096Mb/s 048Mb/s VME backplane pinout

    lg124

    Abstract: No abstract text available
    Text: MT90866 Flexible Digital Switch with H.110 Interface Data Sheet Features • • • • • • • • • • • • • • • • • • • • • • • • December 2002 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between


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    PDF MT90866 192Mb/s 384Mb/s 048Mb/s, 096Mb/s 048Mb/s lg124

    Untitled

    Abstract: No abstract text available
    Text: MT90866 Flexible Digital Switch with H.110 Interface Data sheet Features • • • • • • • • • • • • • • • • • • • • • • • • 2,432 x 2,432 non-blocking switching among local streams 4,096 x 2,432 blocking switching between


    Original
    PDF MT90866 192Mb/s 384Mb/s 048Mb/s, 096Mb/s 048Mb/s