TIC 236 DATASHEET Search Results

9W40

Contextual Info: PM2112 PACIFIC MONOLITHICS DATASHEET Single Supply RFIC Power Amplifier ^ — 1880 to 1990 MHz Operation —— Features • • • • • 3 to 5 V olt Operation 28 dBm O utput Power @ 3V 45% Efficiency Class A Bias Low IM D / ACP Applications • • •

CY37064VP44-125AC

Abstract: TEA 1112 A
Contextual Info: . „ n « PRELIMINARY Ultra37064V UltraLogic 3.3V 64-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 64 macrocells in four logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming

ALP 102 modulator

Abstract: voltage compare tor lm324 simple LM324 COMPARATOR CIRCUIT sot-23 bja gj hall effect marking a hA packages SC70-5 03LG sot23-5 marking ha a13 marking sot235 lmv 358
Contextual Info: 2.0 DEVICE INFORMATION 2.1 DATASHEETS 2.1.1 LMV321/358/324 Datasheet & o National Semiconductor T3 D a> < GJ IO o' LMV321 Single/ LMV358 Dual/ LMV324 Quad General Purpose, Low Voltage, Rail-to-Rail Output Operational Amplifiers 3 (/ a> 3 5. •o G e n e ra l D e s c rip tio n

8s04b

Abstract: FLH 211 ci007 S04N S04B aa15ab
Contextual Info: Lattice ispLSI3256E ; Semiconductor •Corporation High Density Programmable Logic F u n ctio n a l B lo ck Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 256 I/O Pins — 12000 PLD Gates — 512 Registers — High Speed Global Interconnect — Wide Input Gating for Fast Counters, State

Contextual Info: . _ n « PRELIMINARY Ultra37032V UltraLogic 32-Macrocell ISR™ CPLD — tPD = 8.5 ns Features — ts = 5.0 ns • 32 macrocells in two logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.0 ns • • • • • • — JTAG-compliant on-board programming

Contextual Info: 32-Macrocell Flash CPLD Features Functional Description • 32 macrocells in two logic blocks The CY7C371 is a Flash erasable Complex Programmable Logic Device CPLD and is part of the F lash370 ” family of highdensity, high-speed CPLDs. Like all mem­

Contextual Info: DATASHEET APRIL 1997 Revision 2.0 LXT915 Simple Quad Ethernet Repeater The LXT915 is an integrated multi-port repeater designed for mixed-media networks. It provides all the active cir­ Four integrated 10BASE-T transceivers and one AUI transceiver on a single chip

Contextual Info: CY7C383A CY7C384A *= CYPRESS Very High Speed 2K 6K Gate CMOS FPGA — Fast, fully autom atic place and route — Waveform simulation with back annotated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of

Contextual Info: ,!!!!!!ifSmfím ^ . „ n « Ultra37384V PRELIMINARY UltraLogic 3.3V 384-Macrocell ISR™ CPLD Features — tPD = 15 ns — ts = 8 ns • 384 macrocells in 24 logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 8 ns • • • • •

Contextual Info: . „ n « Ultra37128V PRELIMINARY UltraLogic 3.3V 128-Macrocell ISR™CLPD — tPD = 10 ns Features — ts = 5.5 ns • 128 macrocells in eight logic blocks • 3.3V In-System Reprogrammable™ ISR™ — tco = 6.5 ns • • • • • • — JTAG-compliant on-board programming

CI 2272 AN

Abstract: IC 2272 ac
Contextual Info: É LF2272 — ^ Colorspace Converter/ Corrector 3 X 12-bits dev ces \ corpora ed FEATURES □ 50 M Hz Data and Computation Rate □ Full Precision Internal Calculations with Output Rounding □ On-board 10-bit Coefficient Storage □ Overflow Capability in Low

Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with I/Os 3.3 or 5V Compliant – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

atmel h 208

Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with I/Os 3.3 or 5V Compliant – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry Standard Devices

Contextual Info: Enhanced H IV f e m o iy S u t e r n s DM512K64DTBDM512K72DTE Multibank Burst EDOEDRAM 5 12Kb x 64/512Kb x 72 Enhanced DRAM DIMM b e . Product Specification Features • 8Kbytes SRAM Cache Memory for 12ns Random Reads Within Four Active Pages Multibank Cache

bj 94 131- 6

Abstract: DO96
Contextual Info: . „ n « PRELIMINARY Ultra37384 UltraLogic 384-Macrocell ISR™ CPLD — ts = 5.5 ns Features — tco = 6 ns • 384 macrocells in 24 logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes don’t cause pinout changes

Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with 5V Tolerant I/Os – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

K366E

Abstract: N8223N ael 322 ATF1502AE ATF1504AE ATF1508AE ATF1516AE ATF1532AE ATF1504AE-4AC100 306T
Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with 5V Tolerant I/Os – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

ATF1502AE

Abstract: ATF1504AE ATF1508AE ATF1516AE ATF1532AE L35PF ATF1532AE-10AAC144 L9101 d1189f g679
Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with 5V Tolerant I/Os – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

delta software plc using Isp v 1.03

Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with 5V Tolerant I/Os – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

ATF1508AE-10AAC144

Abstract: ATF1502AE-10AC44 169ball
Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with 5V Tolerant I/Os – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

A11458

Abstract: MAKING A10 BGA K744 ATF1502AE ATF1504AE ATF1508AE ATF1516AE ATF1532AE
Contextual Info: Features • 2nd Generation EE Complex Programmable Logic Devices • • • • • • • • • • – 3.0V to 3.6V Operating Range with 5V Tolerant I/Os – 32 - 512 Macrocells with Enhanced Features – Pin-compatible with Industry-standard Devices

Contextual Info: LF2249 12 x 12-bit Digital M ix e r FEATURES □ 40 MHz Data and Computation Rate □ Two 12 x 12-bit M ultipliers w ith Individual Data Inputs □ Separate 16-bit Input Port for Cascading Devices □ Independent, User-Selectable 1-16 Clock Pipeline Delay for Each Data

atmel h 208

Abstract: MC3334
Contextual Info: Features • 2nd Generation EE PROM-based Complex Programmable Logic Devices • • • • • • • • • • – 4.5V to 5.5V Operating Range with I/Os 3.3 or 5V Compliant – 32 - 256 Macrocells with Enhanced Features – Pin-compatible with Industry Standard Devices

ppc750fx

Abstract: ppc 750fx PPC750f t288-2 750FX A115-A T288 TC20 defect ppm sampling
Contextual Info: Standard Product Qualifications PowerPC 750FX DD2.2 & DD2.3 RISC Microprocessor CSOI-9SG Qualification Report Version: Release Date: 1.2 August 2003 Authors: Greg Tomczyk Mark Johnson IBM Microelectronics Page 1 of 18 Standard Product Qualifications PPC750FX Product Information