TLV2541 Search Results

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

PIC 1640

Abstract: TMS320C31 DSK inverter pic assembly code sti 5580 TLV5606 B720 TLC2551 TLC2552 TLC2555 TLV2541
Contextual Info: Data Acquisition Texas Instruments Incorporated Smallest DSP-compatible ADC provides simplest DSP interface By Joe Purvis Figure 1. TLV2541 device pinout Application Specialist Introduction This article features TI’s new TLV2541 12-bit data converter and highlights the ease with which analog signals

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

data addressing modes of TMS320C54xx digital sign

Abstract: Architecture of TMS320C54XX TMS32054x RCR20 tms320c54xx architecture Architecture and features of TMS320C54Xx by texas C5402 flash memory interfacing with TMS320C54xx dsp data addressing modes of TMS320C54xx digital TMS320C5402
Contextual Info: Application Report SLAA098A - September 2001 Interfacing the TMS320C5402 DSP to the TLV2541 ADC and the TLV5636 DAC Lijoy Philipose AAP Data Conversion ABSTRACT This report shows how to interface the TLV2541 and TLV5636 12-bit serial-data converters to the TMS320C5402 DSP via the McBSP. It presents a hardware solution and a software

TLV2541

Abstract: TLV2541CDGK TLV2541IDGK TLV2542 TLV2542CDGK TLV2542IDGK TLV2545 TLV2545CDGK
Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245B –MARCH 2000 – REVISED JULY 2001 D D D D D D D Maximum Throughput . . . 140/200 KSPS Built-In Conversion Clock INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Architecture of TMS320C54XX

Abstract: tms32054x tms320vC5402 starter kit board diagram TMS320C5402 tms320c54xx instruction set RCR20 ar0340 application of tms32054x datasheet of tms32054x IEEE-1284
Contextual Info: Application Report SLAA098 - June 2000 Interfacing the TMS320C5402 DSP to the TLV2541 ADC and the TLV5636 DAC Lijoy Philipose AAP Data Conversion ABSTRACT This report shows how to interface the TLV2541 and TLV5636 12-bit serial-data converters to the ’C5402 via the McBSP. It presents a hardware solution and a software solution to

EVM0309

Abstract: 001CF XFSM 51 TLC32040 TLV2541 TLV5618A TMS320C31 XDS510 TMS320C31 DSK TLV5616 Selection Guide
Contextual Info: Application Report SLAA111 - November 2000 Interfacing the TLV2541 ADC and the TLV5618A DAC to the TMS320C31 DSP Joselito Parguian AAP Data Converters ABSTRACT This application report is written to help design engineers or technicians implement a simple data acquisition system using serial analog-to-digital converters ADCs and

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

TLV2541

Abstract: TLV2541CDGK TLV2541IDGK TLV2542 TLV2542CDGK TLV2542IDGK TLV2545 TLV2545CDGK
Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

MSP430F149

Abstract: MSP430 TLC2551 TLC3541 TLC4541 TLV2541
Contextual Info: Application Report SLAA171 - April 2003 Interfacing the TLV2541 to the MSP430F149 Joe Purvis Data Acquisition Group, Dallas ABSTRACT This application report discusses the SPI interfacing implementation of a system featuring the following devices: TLV2541, TLC2551, TLC3541 and TLC4541. These ADCs offer a

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

TLV2541CDGK

Abstract: TLV2541IDGK TLV2542 TLV2542CDGK TLV2542IDGK TLV2545 TLV2545CDGK TLV2541
Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

OD11

Abstract: TLC4545
Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245C –MARCH 2000 – REVISED JUNE 2002 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245E −MARCH 2000 − REVISED APRIL 2010 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,

TLV2541

Abstract: TLV2541CDGK TLV2541IDGK TLV2542 TLV2542CDGK TLV2542IDGK TLV2545 TLV2545CDGK
Contextual Info: TLV2541, TLV2542, TLV2545 2.7-V TO 5.5-V, LOW-POWER, 12-BIT, 140/200 KSPS, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN SLAS245D –MARCH 2000 – REVISED MAY 2003 D Maximum Throughput . . . 140/200 KSPS D Built-In Conversion Clock D INL/DNL: ±1 LSB Max, SINAD: 72 dB,