TPIC6595 Search Results

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

HP8180A

Abstract: SN74HC595 TPIC6595 TTL catalog TPIC6595s
Contextual Info: TPIC6595 Power+ Logic Eight-Bit Shift Register With Low-Side Power DMOS Switches SPLA004A December 1995 4–1 4–2 Contents Page INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 – 135

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

SLIS010B

Abstract: TPIC6595 TPIC6595DW TPIC6595DWG4 TPIC6595DWR TPIC6595DWRG4 TPIC6595N
Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: A6595 8-Bit Serial Input DMOS Power Driver Features and Benefits Description ▪ 50 V minimum output clamp voltage ▪ 250 mA output current all outputs simultaneously ▪ 1.3 Ω typical rDS(on) ▪ Low power consumption ▪ Replacements for TPIC6595N and TPIC6595DW

MPDI002A

Abstract: MS-001 TPIC6595
Contextual Info: TPIC6595 POWER LOGIC 8-BIT SHIFT REGISTER SLIS010A – APRIL 1992 – REVISED OCTOBER 1995 • • • • • • • Low rDS on . . . 1.3 Ω Typical Avalanche Energy . . . 75 mJ Eight Power DMOS Transistor Outputs of 250-mA Continuous Current 1.5-A Pulsed Current Per Output

TPIC6595

Contextual Info: TPIC6595 POWER LOGIC 8-BIT SHIFT REGISTER SLIS010A – APRIL 1992 – REVISED OCTOBER 1995 • • • • • • • Low rDS on . . . 1.3 Ω Typical Avalanche Energy . . . 75 mJ Eight Power DMOS Transistor Outputs of 250-mA Continuous Current 1.5-A Pulsed Current Per Output

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

TPIC6595

Contextual Info: TPIC6595 POWER LOGIC 8-BIT SHIFT REGISTER SLIS010A – APRIL 1992 – REVISED OCTOBER 1995 • • • • • • • Low rDS on . . . 1.3 Ω Typical Avalanche Energy . . . 75 mJ Eight Power DMOS Transistor Outputs of 250-mA Continuous Current 1.5-A Pulsed Current Per Output

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

TPIC6595

Contextual Info: TPIC6595 POWER LOGIC 8-BIT SHIFT REGISTER SLIS010A – APRIL 1992 – REVISED OCTOBER 1995 • • • • • • • Low rDS on . . . 1.3 Ω Typical Avalanche Energy . . . 75 mJ Eight Power DMOS Transistor Outputs of 250-mA Continuous Current 1.5-A Pulsed Current Per Output

TPIC6595

Abstract: TPIC6595DW TPIC6595DWG4 TPIC6595DWR TPIC6595DWRG4 TPIC6595N TPIC6595D
Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

SN74HC595

Abstract: TPIC6595 p6 stepper motor TTL catalog
Contextual Info: TPIC6595 Power+ Logic Eight-Bit Shift Register With Low-Side Power DMOS Switches SPLA004A December 1995 4–1 4–2 Contents Page INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 – 135

HP8180A

Abstract: tpic6595 HP8180 SN74HC595 TTL catalog Superior Electric stepper
Contextual Info: TPIC6595 Power+ Logic Eight-Bit Shift Register With Low-Side Power DMOS Switches 4–1 4–2 Contents Page INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 – 135 FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 – 135

TPIC6595N equivalent

Abstract: SLIS010B
Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1

Contextual Info: TPIC6595 POWER LOGIC 8ĆBIT SHIFT REGISTER SLIS010B − APRIL 1992 − REVISED MAY 2005 D Low rDS on . . . 1.3 Ω Typical D Avalanche Energy . . . 75 mJ D Eight Power DMOS Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) PGND VCC SER IN DRAIN0 DRAIN1