TR/XO 403 ME Search Results

XO 403

Contextual Info: KT8592 CMOS INTEGRATED CIRCUIT 4 x 4 CROSSPOINT SWITCH WITH CONTROL MEMORY The KT8592 contains 4 x 4 matrix-array w ith 16 latches. Any one of 16 switches can be selected by applying its address to the device and a pulse to the strobe input pin. The selected switch can be turn­

S 239 P

Abstract: S239P
Contextual Info: Te m ic TELEFUNKEN Semiconductors S 239 P Silicon PIN Photo Quadrant Detector Description S239P is a monolithic silicon PIN photodiode array in a quadrant configuration. Four photodiodes on a single chip with a common cathode and separated by only 10æm are mounted

Contextual Info: KM75C03A CMOS FIFO First-in First-out FIFO 2 0 4 8 x 9 CMOS Memory FEATURES DESCRIPTION • First-in , F irst-o u t dual p o rt m em o ry — 20 48 x 9 organization • V ery high speed independent o f d e p th /w id th — 2 0 n s cycle tim es • A synchronous and sim ultan eou s read and w rite

Contextual Info: V’hM w:&*f H Advanced Micro High Density First-In First-Out FIFO 512x9-Bit CMOS Memory Devices Am7201 DISTINCTIVE CHARACTERISTICS • Low power consumption • RAM based FIFO • 512x9 organization • Status flags - full, half-full, empty • Cycle times of 35/45/65/80/100 nanoseconds

Contextual Info: IDT72131 IDT72141 CMOS PARALLEL-TO-SERIAL FIFO 2048 x 9 4096 x 9 In te g ra te d D e v ic e T e c h n o lo g y , Inc. FEATURES: DESCRIPTION: • • • T h e ID T72131/72141 are high -spe ed, low p o w e r parallelto-serial FIFO s. T h ese F IF O s are id ea lly su ite d to serial

XO 403 df

Abstract: V3021 BAT17 BAT85 V3020 "BAT17" 24 hour clock INTEL 8088
Contextual Info: R EM MICROELECTRONIC-MARIN SA V3020 Ultra Low Power 1-Bit 32 kHz RTC Features n n n n n n n n n n n WR or R/W RD or DS CPU Address Decoder Address Bus n Supply current typically 390 nA at 3 V 50 ns access time with 50 pF load capacitance Fully operational from 1.2 V to 5.5 V

V3021

Abstract: Quartz 32768 motorola 24 hour clock INTEL 8088 3N171 BAT17 BAT85 BS107A V3021SO8B intel 8088 memory CX2V-02
Contextual Info: R EM MICROELECTRONIC-MARIN SA V3021 Ultra Low Power 1-Bit 32 kHz RTC n n n n n n n n n n WR or R/W CPU Address Decoder ADDRESS BUS n Supply current typically 800 nA at 3 V 50 ns access time with 50 pF load capacitance Fully operational from 2.0 V to 5.5 V

00E35

Abstract: 7217l20
Contextual Info: 16 X 16 PARALLEL CMOS MULTIPLIERS IDT7216L IDT7217L Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • • • 1 6 x 1 6 parallel m u ltip lie r with do uble precision product 16ns clocked m u ltip ly tim e Lo w po w e r con sum ptio n: 120m A •

A6165

Abstract: fr1s 15C6 CAB-54C JD 1806 6605 11C6 CAB32 cab-47 mn 9105
Contextual Info: Lrttte Rebete are one of Ohmite's more economical lines o i low wattage resistors. Constructed of a pure carton film deposited on a higi\-flrade c eram c body, these unit* orter better stability perfor­ m ance than comparable carbon composition resistors.

GG2Q

Abstract: Dt7210
Contextual Info: CMOS PARALLEL-SERIAL FIFO 2048 X 9, 4096 x 9 IDT72103 IDT72104 Integrated D evice Technology, Inc. FEATURES: APPLICATIONS: • • • • • • • • • • • • • • • • • • • • 35ns parallel port access time, 45ns cycle time 50MHz serial input/output frequency

Contextual Info: * U •semiconductor s AP9A403A 2048 x 9 Asynchronous CMOS FIFO Features • Fast access times: 15, 20, 25,35 ns • Fast-fall-through time architecture based on CMOS dual-port SRAM technology • Independent timing on input and output port • Expandable-in width and depth

Contextual Info: IDT7216L IDT7217L 16 x 1 6 PARALLEL CMOS MULTIPLIERS Integrated Device Technology, Inc. DESCRIPTION: FEATURES: T h e ID T 7 2 1 6 /ID T 7 2 1 7 a re h ig h -s p e e d , lo w -p o w e r 16 x 16-bit multipliers ideal for fast, real time digital signal processing applications. Utilization of a modified Booths

Contextual Info: S IE M E N S S/T Bus Interface Circuit Extended SBCX Preliminary Data PEB 2081 CMOS IC Type Ordering Code Package PEB 2081-N PEB 2081-P PEB 2081-P Q67100-H6093 Q67100-H6091 planned PL-CC-28 (SMD) P-DIP-28 P-DIP-22 The S/T Bus interface Circuit Extended (SBCX) PEB 2081 implements the four-wire S/T

mc6821bqca

Abstract: MC68121 MC68705U3 MC68120L1 MC146805G2P mc146805g 68705 M68705P3 MC6854 M6809
Contextual Info: ^ MOTOROLA 8-Bit MPUs 8-Bit MCUs 8-Bit Peripherals SEM ICONDUCTORS 3501 ED BLUESTEIN BLVD., AUSTIN, TEXAS 78721 THE M6800 FAMILY The MC6800 m icroprocessor w as the first MPU o f the M6800 Family and still remains a highly cost-effective pro­ cessor fo r a great m any process-control and datacom m unications applications. S eve nty-tw o pow erful in­

Contextual Info: IBM2520L8767 Preliminary ATM Resource Manager Features other uses DRAM devices. A single array of memory can be used in systems whose sus­ tained full-duplex total bandwidth requirement is less than 102Mb/s. • Optimized for server applications. • Configurable for sustained performance of up to

Contextual Info: Deep First-In First-Out FIFO 5 12 x9 CMOS Memory 67C 4501 - 5 0 /6 5 /8 0 Features : — Ordering Information • RAM-based FIFO PART NUMBER DESCRIPTIO N • Cycle times of 65/80/100 nanoseconds 67C 4501-50 N 5 1 2 -w o rd b y 9 -b it FIFO N C om • Asynchronous and simultaneous writes and reads

xo 403 me

Abstract: siemens master drive circuit diagram nt 407 f siemens LAL 2.25 TE-32 BY392 siemens sx1 PSB2160 SC11 Bptx1
Contextual Info: S IE M E N S S/T Bus Interface Circuit Extended SBCX Preliminary Data PEB 2081 CMOS IC Type Ordering Code Package PEB 2081-N PEB 2081-P PEB 2081-P Q67100-H6093 Q67100-H6091 planned PL-CC-28 (SMD) P-DIP-28 P-DIP-22 The S/T Bus interface Circuit Extended (SBCX) PEB 2081 implements the four-wire S/T

87CM40

Abstract: MX-38T TMP87CC40N OF80B tmp87cm40an C40F 87CK40 MX-38T 32.768 TMP87C840F TMP87C840N
Contextual Info: TO SHIBA TM P87 C840/C40/H 40/K40A/M 40A CMOS 8-Bit M icrocontroller TMP87C840N, TMP87C840F, TMP87CC40N, TMP87CC40F, TMP87CH40N, TMP87CH40F, TMP87CK40AN, TMP87CM40AN TMP87CK40AF, TMP87CM40AF The 87C840/C40/H40/K40A/M40A are the high speed and high performance 8-bit single chip microcomputers.

VFD Vacuum Fluorescent Display

Abstract: MBM27C32A "VFD,Vacuum Fluorescent Display" MB8850B MB8855 UCF example for QFP MDIP-42C MB8850 MB8855BPF 3F00-3FFF
Contextual Info: TM341-A871: January 1987 CMOS SINGLE-CHIP 4-BIT MICROCOMPUTER WITH VFD DRIVER PORT The Fujitsu MB8850B series CMOS single-chip 4-bit microcomputer family is a variation of the conven­ tional MB8850 series. It is designed based on the MB8850 series architecture, and contains 16 VFD

Y12 305

Abstract: CI 7408 el 7406 itt 789 sn74as8838 SN74AS8839 AS8839
Contextual Info: p SN74AS8839 32-Bit Shuffle/Exchange Network • High speed data m anipulation • Shuffles up to 32-Bit data streams • Performs shuffle and exchange perm utations on entire data streams or substrings for implementing algorithms an d /or matrix operations

Integrated cd 2025 cp

Abstract: Am2055 TLX2 siemens PABX ISDN IOM S-Bus interface echo ISDN echo cancellation SR1M-2
Contextual Info: Nov : I i99lj Preliminary a Advanced Micro Devices Am2080/Am2080B S-Bus Interface Circuit SBC DISTINCTIVE CHARACTERISTICS • Full duplex 2B + D SH’-interface transceiver according to CCITT 1.430 ■ Conversion of the frame structure between the S/T and IOM interfaces

TMS9900

Abstract: 74LS362 SN74LS362 TMS9900 instruction set TMS 9900 t03h tms99 TMS6011 sla 4051 sn74s471
Contextual Info: The Engineering Staff of TEXAS INSTRUMENTS INCORPORATED Semiconductor Group TMS 9900 Microprocessor Data Manual DECEMBER 1976 T exas In st r u m e n t s IN C O RP O R A T E D Inform ation contained in this publication is believed to be accurate and reliable. However, responsibility is assumed neither for its use nor for any

Contextual Info: Philips Sem iconductors Data Com m unications Products Prelim inary specification Octal universal asynchronous receiver/transmitter UART DESCRIPTION SC26C198 • Sixteen byte receiver FIFO s for each UART The Philips 2 6 C 198 Octal UART is a single chip CMOS-LSI

x2 le 224 0,22

Abstract: jcb 520 star auto trans wiring diagram
Contextual Info: Nov : I i99lj Preliminary a Advanced Micro Devices Am2080/Am2080B S-Bus Interface Circuit SBC DISTINCTIVE CHARACTERISTICS • Full duplex 2B + D SH’-interface transceiver according to CCITT 1.430 ■ Conversion of the frame structure between the S/T and IOM interfaces