TRA8 L Search Results

TC514400

Abstract: TCWP
Contextual Info: • ^ Sill - . ■■- - - ^ M P M R m Ê t o -.i— ■ SfflMfaWWW« mtssSsm M — l ■ ¡■ ¡ p s i 1,048,576 WORD x 4 BIT DYNAMIC RAM * This is advanced information and specifications are subject to change without notice. DESCRIPTION The TC514400J/Z is the new generation dynamic RAM organized 1,048,576 words by 4

Contextual Info: NEC MOS INTEGRATED CIRCUIT juPD42S4400L, 424400L 3.3 V OPERATION 4 M BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description The /¿PD42S4400L, 424400L are 1 048 576 w ords by 4 bits dynam ic CMOS RAMs. The fast page mode capability realize high speed access and low power consumption.

DML D01

Contextual Info: HYUNDAI HY514810B Series 5 1 2 K x 8 - b it C M O S DRAM w ith W r ite -P e r - B II PRELIMINARY DESCRIPTION The HY51481 OB is the new generation and fast dynamic RAM organized 524,288 x 8-bits. The HY51481 OB utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating

Contextual Info: ••HYUNDAI H Y 5 1 1 7 4 1 0 S e r ie s 4M X 4-bit C M O S DRAM with Write-Per-Bit DESCRIPTION The HY5117410 is the new generation and fast dynamic RAM organized 4,194,304 x 4-bit with function of Write-Per-Bit. The HY5117410 utilizes Hyundai’s CMOS silicon gate process technology as well as advanced

Contextual Info: MT4LC2M8E7 L 2 MEG X 8 DRAM M IC R O N 2 MEG x 8 DRAM DRAM 3.3V, EDO PAGE MODE, OPTIONAL EXTENDED REFRESH PIN ASSIGNMENT (Top View) • Industry-standard x8 pinout, timing, functions and packages • High-performance CMOS silicon-gate process • Single +3.3V ±0.3V power supply

Contextual Info: “HYUNDAI HY51V4810B Series 5 1 2 K x 8 -b tt CM O S DRAM w it h W r it e - P e r - B it PRELIMINARY DESCRIPTION The HY51V4810B is the new generation and fast dynamic RAM organized 524,288 x 8-bits. The HY51V4810B utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

Contextual Info: • TRAN ^ k 1004152 0007020 104 ■ CUBIT Device «g*, »* jiüüM R. > ,.M V. CellBus Bus Switch TXC-05801 DATA SHEET DESCRIPTION FEATURES CUBIT is a single-chip solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus bus architecture. Such systems

Contextual Info: C U B IT Device C eîîB us Switch TXC-05801 DATA SH EE T FEATURES DESCRIPTION • U TO PIA or A LI-25 physical-layer cell interface C U B IT is a single-chip solution fo r im plem enting low -cost ATM m ultiplexing and sw itching system s, based on the CellBus architecture. Such system s are

7 pin ic cp43

Abstract: ALI-25 ALI-25C rh30100
Contextual Info: CUBIT-Pro Device t r a n S w it c h CellBus Bus Switch TXC-05802 X- DATA SHEET DESCRIPTION FEATURES • UTOPIA and 16-Bit ATM or PHY or ALI-25 PHY Layer cell interfaces • Inlet-side address translation and routing header insertion, using external SRAM of up to 256 kB

Contextual Info: CUBIT-3 Device CellBus Bus Switch TXC-05804 DATA SHEET DESCRIPTION FEATURES CUBIT®-Pro The CUBIT-3 is a single-chip VLSI solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus® architecture. Such systems are constructed from a number of CUBIT-3 devices, all

TXC-05804-MB

Abstract: sot marking code w17 W17 marking code sot 23
Contextual Info: CUBIT-3 Device CellBus Bus Switch TXC-05804 DATA SHEET CUBIT®-Pro The CUBIT-3™ is a single-chip VLSI solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus® architecture. Such systems are constructed from a number of CellBus devices, all

A01H

Abstract: 9FF MARKING T-RA18 SA 6356
Contextual Info: CUBIT-622 Device Multi-PHY CellBus Access Device TXC-05805 DESCRIPTION • 622 Mbit/s performance • UTOPIA Level 1/2 interface 8/16-bit with support for 64 ports • Tandem operation for two devices, supporting dual CellBus cell switching in load sharing or

Contextual Info: CUBIT-622 Device DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES The CUBIT-622 device is a single-chip solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus architecture. Such systems are built from a number of CUBIT-3,