TRANSWITCH Search Results

TranSwitch Corporation

Abstract: 32c33 Transwitch lot code
Contextual Info: DS3RTA P and N Rail Device DS-3 Line Interface TXC -02002 w PRELIMINARY DATA SHEET TranSwitch 1990 FEATURES = Patents Pending DESCRIPTION i The DS3RTA is similar in function with the DS3RT TXC02001 . The DS3RTA features P and N rail I/O on the NRZ terminal side of the device. The P and N data outputs corre­

HML 075 IC

Abstract: D3T01
Contextual Info: DS3RT Device DS-3 Line Interface TXC -02001 PRELIMINARY DATA SHEET TranSwitch 1991 FEATURES DESCRIPTION Provides all functionality required to terminate a DS-3 signal: - B3ZS/NRZ decoder - Clock recovery and filter - All line equalization - LOS/LOC detection and AIS

Contextual Info: MRT Device X co u w 6-, 8-, 34-Mbit/s Line Interface TXC-02050 DATA SHEET FEATURES DESCRIPTION ' = = The TranSwitch Multi-rate Receive/Transmit MRT device is a CMOS VLSI device that provides the func­ tions needed for terminating two CCITT line rates, 8448

Contextual Info: POP-3 Device tm ah S w it c h x - 5 STM-1/STS-3/STS-3C SDH/SONET POH Terminator with Telecom Bus Interface TXC-06303 TECHNICAL OVERVIEW PRODUCT PREVIEW FEATURES DESCRIPTION • The TranSwitch POP-3 TXC-06303 is an STM -1/S TS 3/S T S -3c path overhead processing device that provides a

Crystal Oscillator TXC

Abstract: Koch Filter txc crystal TXC-02624-ACCL TXC oscillator 25 MHZ TXC
Contextual Info: CDR Device SONET/SDH Clock and Data Recovery 622 Mbit/s TXC-02624 DATA SHEET Preliminary FEATURES DESCRIPTION • Single-chip CDR circuit for 622 Mbit/s data The TranSwitch TXC-02624 VLSI device is a monolithic clock and data recovery CDR component that

msop5

Abstract: VT150 B14 diode on semiconductor
Contextual Info: Envoy -8FE Device Octal Fast Ethernet Controller TXC-06840 DATA SHEET NETWORK SIDE +1.8v +3.3v 10/100 Mbit/s SMII Port 0 10/100 Mbit/s SMII (Port 7) z z z z z z U.S. and/or foreign patents issued or pending Copyright 2003 TranSwitch Corporation Envoy is a trademark of TranSwitch Corporation

TXC-21055

Abstract: JESD22-A112-A PE65966 HDB3 coding
Contextual Info: E3RT Device 34 Mbit/s E3 Line Interface TXC-02053 DATA SHEET FEATURES DESCRIPTION • 34368 kbit/s line interface The TranSwitch 34 Mbit/s E3 Receiver/Transmitter Line Interface E3RT is a Bi-CMOS VLSI device that provides the functions needed for terminating the ITU-T

DS3RT

Abstract: CERAMIC LEADLESS CHIP CARRIER TXC-02001
Contextual Info: NOV 1 9 1999 DS3F DEVICE DS-3 FRAMER TXC -03401 DATA SHEET SUMMARY TranSwitch 1990 Description Features Patents Pending •■ - The DS3F is a single-device bridge between wideband dafa sources and DS-3 signals compatible with the public network. It does all of the work of synchronizing to a DS-3 signal and

CERAMIC LEADLESS CHIP CARRIER

Contextual Info: • nv 1 0 DS3RT Device DS-3 Line Interface TXC” -02001 DATA SHEET SUMMARY TranSwitch 1990 Description Features • Provides all functionality required to terminate a DS3 signal: - B3ZS/NRZ Codec - Clock recovery and filter - All line buildout - LOS/LOC detection and AIS generation

2RD6

Abstract: RB35 TDNB0
Contextual Info: BACK HDLC Device HDLC Controller TXC-05101C DATA SHEET Preliminary FEATURES DESCRIPTION • HDLC ISO/OSI level 2 functions, including internal flag, abort, and zero deletion/insertion The TranSwitch TXC-05101C is a high speed, High Level Data Link Controller HDLC designed to send

TXC-06103

Contextual Info: TranSwitch Corporation | Complete Product Listing Products Documents Evaluation Board User's Ed. 1A, August 28, 2001 214531am1.pdf; 1524KB Home » Products » PHAST-3N/TL3M Evaluation Board PHAST-3N/TL3M Evaluation Board PHAST -3N/TL3M Evaluation Board TXC21453

TXC-04001-BIPL

Abstract: TXC-04001-AIPL TXC-04011-BIPQ
Contextual Info: TB-512 TECHNICAL BULLETIN ADMA-T1 VLSI Device, TXC-04001 Differences Between the “A” and “B” Versions of the ADMA-T1 Device PURPOSE OF THIS TECHNICAL BULLETIN TranSwitch has introduced a “B” version of the ADMA-T1 VLSI device, which is a dual T1 mapper that

computer schematic power supply circuit diagram

Abstract: circuit diagram for computer TXC-02001 layout diagram of microprocessor
Contextual Info: DS3F Evaluation Board Set DS3 Framer TXC-21005 PRODUCT INFORMATION FEATURES DESCRIPTION • Complete two-board test system for evaluating the TranSwitch DS3F device: - DS3F: DS3 Framer Device TXC-03401 A complete ready-to-use two-board test system that demonstrates the functions and features of the TranSwitch

TXC-02050

Abstract: 21047 circuit diagram for computer
Contextual Info: JT2F-MRT Evaluation Board JT2 Framer and Line Interface TXC-21047 PRODUCT INFORMATION FEATURES DESCRIPTION • Complete single-board test system for evaluating TranSwitch JT2F and MRT VLSI devices operating at 6 Mbit/s: - JT2F: 6 Mbit/s Framer Device TXC-03702

TXC-06742

Abstract: EtherPHAST-48 msap STM-16 mapper TXC-06743 TXC-06745
Contextual Info: EtherPHAST Family EtherPHAST-48 Plus TXC-06742 EtherPHAST-24 (TXC-06745) EtherPHAST-2GE (TXC-06743) EoS/SAN Framer-Mapper Product Family for SONET/SDH Transport TranSwitch’s EtherPHAST family of transport devices allows customers to choose the optimal configuration and price point

epon

Abstract: epon soc "Content Addressable Memory" EPON ONU ONU block diagram GMII VLAN Tag Colt OLT SoC 256kBytes ethernet mac chip
Contextual Info: Colt CE 100 TM Product Brief Mixed-Signal EPON The Colt 100 SoC supports the complex set of capabilities required by service providers deploying Central Office equipment in Ethernet Passive Optical Networks EPON . In association with TranSwitch’s complementary chip, the Mustang supports all the

Contextual Info: XAUI-to-XAUI Retimer With Integrated Optical Controller TXC-43129 MY3129 High Performance 10GBASE-LX4 Transceiver TranSwitch’s XAUI-to-XAUI Retimer is optimized for 10Gbase-LX4 optical module applications providing a low power and low cost solution. The fully-integrated device is a cost-effective intersystem solution with Dual 10 Gigabit Ethernet PHY core, comprised of a LX4

TXC-05551

Abstract: TXC-05551-SCBA TXC-05551-SCCA aal0
Contextual Info: SARA-2 Product Family ATM Segmentation and Reassembly TXC-05551 PRODUCT INFORMATION OVERVIEW OF SARA-2 PRODUCT FAMILY INTRODUCTION TranSwitch has introduced the SARA-2 family of high-performance ATM cell processing products that provide the ultimate combination of ultra high-performance and programmable flexibility. This combination will enable system

TXC-03401-BIPL

Abstract: TXC-03401-AIPL TXC-03401B-PDR3A txc03401bipl
Contextual Info: TB-511 TECHNICAL BULLETIN DS3F VLSI Device, TXC-03401 Differences Between the “A” and “B” Versions of the DS3F Device PURPOSE OF THIS TECHNICAL BULLETIN TranSwitch is introducing a “B” version of the DS3F VLSI device, with general sample availability scheduled for the first quarter of 1997. This “B” version has some extended features and other functional differences relative to the current “A” version.

PAL29M16

Abstract: TXF2 AN-405
Contextual Info: AN-405 APPLICATION NOTE JT2F, CDB Devices, TXC-03702, -05105 Designing with TranSwitch JT2F and CDB Devices for Terminating ATM Applications at JT2 Data Rates Copyright 1995 TranSwitch Corporation TXC and TranSwitch are registered trademarks of TranSwitch Corporation

multiplexing demultiplexing e2 e3

Abstract: ALI-25 STM-16 Design Seminar Signal Transmission
Contextual Info: R TS-501 TECHNOLOGY SEMINAR Technology Seminar • Voice Networks Telephony • Data Networks (Datacom) This is the Voice Annotated Edition of the TranSwitch Technology Seminar. When viewing this document on a Windows or Macintosh platform, click on the Win/Mac Sound logos to hear the voice annotation.

SARA-R

Abstract: TXC-05501 TXC-05501-ACPQ TXC-05501-BCPQ TXC-05601-ACPQ TXC-05601-BCPQ T-78 TB515 T78-5V DC
Contextual Info: TB-515 TECHNICAL BULLETIN SARA Chipset, TXC-05501/05601 Differences Between the “A” and “B” Versions of the SARA Chipset PURPOSE OF THIS TECHNICAL BULLETIN During August, 1995, TranSwitch issued an Informational Notification entitled Functional “B” SARA Devices

TXC-05501-ACPQ

Abstract: TXC-05501-BCPQ TXC-05601-ACPQ TXC-05601-BCPQ
Contextual Info: CA-518 Customer Advisory SARA Devices "B" SARA Devices Have Replaced "A" SARA Devices -Last-Time Buy Notification for "A" SARA Devices Transition Period One year ago, in May 1995, TranSwitch Corporation announced the availability of new speed-enhanced Functional "B" SARA devices and the phase-out of Functional "A" SARA devices Reference: Product

TXC-21055

Abstract: TXC-02050
Contextual Info: MRT Evaluation Board 6-, 8-, 34-Mbit/s Line Interface TXC-21055 PRODUCT INFORMATION FEATURES DESCRIPTION • Complete single-board test system for evaluating the TranSwitch MRT VLSI device: A complete ready-to-use single-board test system that demonstrates the functions and features of the TranSwitch