TRISTATE DEMULTIPLEXER Search Results

74F538

Abstract: 74F538PC 74F538SC 74F538SJ C1995 M20D 9551
Contextual Info: 74F538 1-of-8 Decoder with TRI-STATE Outputs General Description The ’F538 decoder demultiplexer accepts three Address A0 – A2 input signals and decodes them to select one of eight mutually exclusive outputs A polarity control input (P) determines whether the outputs are active LOW or active

74F537

Abstract: 74F537PC 74F537SC 74F537SJ C1995 F537 M20D
Contextual Info: 74F537 1-of-10 Decoder with TRI-STATE Outputs General Description The ’F537 is one-of-ten decoder demultiplexer with four active HIGH BCD inputs and ten mutually exclusive outputs A polarity control input determines whether the outputs are active LOW or active HIGH The ’F537 has TRI-STATE outputs and a HIGH signal on the Output Enable OE input

Contextual Info: August 1995 74F537 1-of-10 Decoder with TRI-STATE Outputs General Description The ’F537 is one-of-ten decoder/demultiplexer with four ac­ tive HIGH BCD inputs and ten mutually exclusive outputs. A polarity control input determines whether the outputs are

cd 7377

Contextual Info: tß N a t i o n a l Semi conduct or 74F538 1-of-8 Decoder with TRI-STATE Outputs General Description The 'F538 decoder/demultiplexer accepts three Address A 0 - A 2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P)

Contextual Info: 537 & National Semiconductor 74F537 1-of-10 Decoder with TRI-STATE Outputs General Description The 'F537 is one-of-ten decoder/demultiplexer with four ac­ tive HIGH BCD inputs and ten mutually exclusive outputs. A polarity control input determines whether the outputs are

Contextual Info: EHNational ÆM Semiconductor 54F/74F538 1-of-8 Decoder with TRI-STATE Outputs General Description The 'F538 decoder/demultiplexer accepts three Address A0- A 2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P)

Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Preliminary Datasheet 2.488 Gbit/sec 1:32 SONET/SDH Demux VSC8132 Features • 2.488Gb/s 1:32 Demultiplexer • Frame Detect Synchronization • SONET STS-48/SDH STM-16 • 77.76, 51.84, and 38.88MHz TTL Clock Outputs • LVPECL Differential High Speed Serial Data

VSC8132

Abstract: STM-16 CLK38
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Preliminary Data Sheet VSC8132 2.488Gb/s 1:32 SONET/SDH Demux Features • 2.488Gb/s 1:32 Demultiplexer • 77.76, 51.84, and 38.88MHz TTL Clock Outputs • SONET STS-48/SDH STM-16 • Single 3.3V supply • HSPECL Differential Serial Data and Clock

STM-16

Abstract: VSC8132
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Preliminary Data Sheet VSC8132 2.488Gb/s 1:32 SONET/SDH Demux Features • 2.488Gb/s 1:32 Demultiplexer • 77.76, 51.84, and 38.88MHz TTL Clock Outputs • SONET STS-48/SDH STM-16 • Single 3.3V supply • HSPECL Differential Serial Data and Clock

74F139PC

Abstract: 54F139DM 54F139FM 54F139LM 74F139 74F139SC 74F139SJ F139 J16A N16E
Contextual Info: 54F 74F139 Dual 1-of-4 Decoder Demultiplexer General Description Features The ’F139 is a high-speed dual 1-of-4 decoder demultiplexer The device has two independent decoders each accepting two inputs and providing four mutually exclusive active LOW outputs Each decoder has an active LOW Enable input which can be used as a data input for a 4-output demultiplexer Each half of the ’F139 can be used as a function

9478

Abstract: 54F138DM 54F138FM 54F138LM 74F138 74F138PC 74F138SC 74F138SJ F138 J16A
Contextual Info: 54F 74F138 1-of-8 Decoder Demultiplexer General Description Features The ’F138 is a high-speed 1-of-8 decoder demultiplexer This device is ideally suited for high-speed bipolar memory chip select address decoding The multiple input enables allow parallel expansion to a 1-of-24 decoder using just

Contextual Info: 54F 74F138 1-of-8 Decoder Demultiplexer General Description Features The ’F138 is a high-speed 1-of-8 decoder demultiplexer This device is ideally suited for high-speed bipolar memory chip select address decoding The multiple input enables allow parallel expansion to a 1-of-24 decoder using just

octal Bilateral Switches

Abstract: MM74HC14M MM74HC138M CD4025BCM MM74HC00M MM74HC74AM MM74HC125M MM74HC04M cd4046bcm cd4052bcm
Contextual Info: 1/3 CMOS LOGIC MM74HC SERIES MM74HCT/U SERIES • HIGH SPEED CMOS TECHNOLOGY, CMOS DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES Part Number Description • HIGH SPEED CMOS TECHNOLOGY, TTL DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES SQP £ ea. Gates & Inverters

BCD 4543

Abstract: 4564 RAM 4 bit binary pipeline ripple carry adder 4558, 4560 74F701
Contextual Info: S* Section 4 Contents 54F/74F00 Quad 2-Input NAND G a te . 54F/74F02 Quad 2-Input NOR G a te .

74AC367

Abstract: 74ACT705 74ac2526 74ac2525 54AC/74AC2525
Contextual Info: Section 4 Contents 54AC/74AC00 Quad 2-Input NAND G a te . 54ACT/74ACT00 Quad 2-Input NAND Gate .

74HC series

Abstract: 74HC 74HC buffer tri-state output 74HC/74HC series
Contextual Info: Continued from previous page Package Device type Number ot Drawing pins and number configuration Description Features High-speed 74HC series, miniflat package version of the MLC74HC253 MLC74HC253M'’ MFP 16 3139 Dual 4-line to 1-line data selector/multiplexer

74xxx

Abstract: ic 74 LS 138 DECODER HC- 543 4046 analog IC tristate demultiplexer Schieberegister SR flip flop IC vhc 164 IC INVERTER 8-bit 4538 bcd
Contextual Info: VHCT VHC LVXU LVCU LVCH X X X X X X X X X X X X X X STD X X X X X OL X LVX X X LVU X X LVT X LVQ X LVC X X X X X X X X X X X X X LV LCX X LS HCT HCU HC FCT F BCT ALS AL ACTQ ACT AC ABT xxx 74xxx Gatter AND OR NAND NOR Quad 2-Eingänge 08 Quad 2-Eingänge oc

74HC

Contextual Info: Continued from previous page Package D trin Type Number of Drawing pins and number configuration Features OeaojpUon High-speed 74HC series, miniflat package version of the MLC74HC74A MLC74HC74AM MFP 14 3138 Dual D positive-edge-triggered flip-flop with preset and clear

TS 4142

Abstract: CT244
Contextual Info: Section 4 Contents 74VHC00, 74VHCT00 Quad 2-Input NAND G a te . 74VHC02 Quad 2-Input NOR G a te .

8 bit bcd adder subtractor

Abstract: 4 bit serial subtractor bcd subtractor binary 4 bit serial subtractor 4 Bit BCD Subtractor 4-bit bcd subtractor
Contextual Info: NATIONAL SENICOND {LOGIC} L.S0115S □Dbö3QS û 31E D Function 8-Input : Dual 4-Input Quad 2-Input Quad 2-Input Inverting 8-Input (TRI-STATE) Dual 4-Input (TRI-STATE) . / Quad 2-Input (TRI-STATE) Quad 2-Input (TRI-STATE, Inverting) 4-Input w/Shift (TRI-STATE)

E123 multiplexer

Abstract: HDB3 E2 multiplexers 74 LS 150 C10l 03361
Contextual Info: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET FEATURES DESCRIPTION • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format) The E123MUX is a CMOS VLSI device that provides the

c5lsm

Abstract: TXC-03361 e2 framer g742 E12M
Contextual Info: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET FEATURES DESCRIPTION • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format) The E123MUX is a CMOS VLSI device that provides the

c5lsm

Abstract: TXC-03361 C7NR E123 multiplexer
Contextual Info: E123MUX Device E1/E2/E3 MUX/DEMUX TXC-03361 DATA SHEET DESCRIPTION FEATURES • E1 2048 kbit/s multiplexer/demultiplexer for ITU-T Recommendations: G.742 (8448 kbit/s E2 frame format) G.751 (34368 kbit/s E3 frame format) The E123MUX is a CMOS VLSI device that provides

NTE8316

Contextual Info: INTEGRATED CIRCUITS - TTL TRANSISTOR TRANSISTOR LOGIC NTE74HC4040 16-Lead DIP, See Diag. 249 12-Stage Binary Counter (CMOS) NTE74HC4053 16-Lead DIP, See Diag. 249 Triple 2-Channel Analog Multiplexer/Demultiplexer (CMOS) B Vcc 1Y r i B Q11 0Y Ü 3 1Z Q Q10