TSX FET Search Results

29C16

Abstract: 29c17 TF DKL
Contextual Info: A G M Ä M ! O M IP Û fô G M T O N ] in te T 29C16 AND 29C17 16 PIN CHMOS SINGLE CHIP PCM CODEC AND FILTER • 29C16 ju-Law, 2.048 MHz Master Clock ■ 29C17 A-Law, 2.048 MHz Master Clock 3 Low-Power Modes — 3.5 mW Typical Power Down — 3.5 mW Typical Standby

addressing mode of mc68hc08

Abstract: 00FF AN2093 CPU08 HC08 M68HC08 MC68HC08 AN2093 Motorola
Contextual Info: Order this document by AN2093/D Motorola Semiconductor Application Note AN2093 Creating Efficient C Code for the MC68HC08 by Stuart Robb East Kilbride, Scotland 1 Introduction The C programming language is a powerful, flexible and potentially portable high-level programming language. These and other features,

addressing mode of mc68hc08

Abstract: 00FF AN2093 CPU08 HC08 M68HC08 MC68HC08
Contextual Info: Freescale Semiconductor, Inc. Order this document by AN2093/D Motorola Semiconductor Application Note AN2093 Freescale Semiconductor, Inc. Creating Efficient C Code for the MC68HC08 by Stuart Robb East Kilbride, Scotland 1 Introduction The C programming language is a powerful, flexible and potentially

Contextual Info: intJ. 2916/2917 HMOS COMBINED SINGLE CHIP PCM CODEC AND FILTER 2916 ft-Law, 2.048 MHz Master Clock Fixed Timing Mode for Standard 32-Channel Systems: 2.048 MHz Master Clock 2917 A-Law, 2.048 MHz Master Clock New 16-Pin Package for Higher Linecard Density Low Power HMOS-E Technology

addressing mode of mc68hc08

Abstract: 00FF AN2093 CPU08 HC08 M68HC08 MC68HC08 HC08 c code example
Contextual Info: Freescale Semiconductor Order this document by AN2093/D AN2093 Freescale Semiconductor, Inc. Creating Efficient C Code for the MC68HC08 by Stuart Robb East Kilbride, Scotland 1 Introduction The C programming language is a powerful, flexible and potentially

km 1667

Abstract: d 1667
Contextual Info: intJ. 2913 AND 2914 COMBINED SINGLE-CHIP PCM CODEC AND FILTER • 2913 Synchronous Clocks Only, 300 Mil Package ■ Exceptional Analog Performance ■ 28-Pin Plastic Leaded Chip Carrier PLCC for Higher Integration ■ 2914 Asynchronous Clocks, 8th Bit Signaling, Loop Back Test Capability

DIP20

Abstract: M5913 M5913B1
Contextual Info: M5913 COMBINED SINGLE CHIP PCM CODEC AND FILTER SYNCHRONOUS CLOCKS ONLY AT&T D3/D4 AND CCITT COMPATIBLE TWO TIMING MODES: FIXED DATA RATE MODE 1.536MHz, 1.544MHz, 2.048MHz VARIABLE DATA MODE: 64KHz - 4.096MHz PIN SELECTABLE µ-LAW OR A-LAW OPERATION NO EXTERNAL COMPONENTS FOR SAMPLE-AND-HOLD AND AUTO ZERO FUNCTIONS

GSR-V

Abstract: DIP20 M5913 M5913B1
Contextual Info: M5913 COMBINED SINGLE CHIP PCM CODEC AND FILTER SYNCHRONOUS CLOCKS ONLY AT&T D3/D4 AND CCITT COMPATIBLE TWO TIMING MODES: FIXED DATA RATE MODE 1.536MHz, 1.544MHz, 2.048MHz VARIABLE DATA MODE: 64KHz - 4.096MHz PIN SELECTABLE µ-LAW OR A-LAW OPERATION NO EXTERNAL COMPONENTS FOR SAMPLE-AND-HOLD AND AUTO ZERO FUNCTIONS

GSR-V

Abstract: Ringing Subscriber Line Interface Circuit NXP DIP20 M5913 M5913B1
Contextual Info: M5913 COMBINED SINGLE CHIP PCM CODEC AND FILTER SYNCHRONOUS CLOCKS ONLY AT&T D3/D4 AND CCITT COMPATIBLE TWO TIMING MODES: FIXED DATA RATE MODE 1.536MHz, 1.544MHz, 2.048MHz VARIABLE DATA MODE: 64KHz - 4.096MHz PIN SELECTABLE µ-LAW OR A-LAW OPERATION NO EXTERNAL COMPONENTS FOR SAMPLE-AND-HOLD AND AUTO ZERO FUNCTIONS

Contextual Info: IN T E L CORP -CMEMORY/LOGIC} n 4826176 IN TEL CORP M EM O RY/LO G IC i>Ë| LiüHblTfc, O D S ä ^ S 99D 58935 D 29C13 AND 29C14 CHMOS COMBINED SINGLE-CHIP PCM CODEC AND FILTER AT&T D3/D4 and CCITT Compatible 29C14 Asynchronous Clocks, 8th Bit Signaling, Loop Back Test Capability

sinusoidal

Abstract: POWER SUPPLY 2916 fxs interface integrated circuit
Contextual Info: in t j, 2916/2917 HMOS COMBINED SINGLE CHIP PCM CODEC AND FILTER 2916 /x-Law, 2.048 MHz Master Clock 2917 A-Law, 2.048 MHz Master Clock New 16-Pin Package for Higher Linecard Density AT&T D3/D4 and CCITT Compatible Variable Timing Mode for Flexible Digital Interface: Supports Data Rates

KM-59-13

Abstract: TS encoder 1SS150
Contextual Info: r= J ^ 7/, SG S -T H O M S O N KÆD [E] [i[L[l©Tr^ 2 R!lD©i M 5913 COMBINED SINGLE CHIP PCM CODEC AND FILTER • SYNCHRONOUS CLOCKS ONLY ■ AT&T D3/D4 AND CCITT COMPATIBLE . TW O TIMING MODES: FIXED DATA RATE MODE 1.536MHz, 1.544MHz, 2.048MHz VARIABLE DATA MODE: 64KHz - 4.096MHz

29C14

Contextual Info: in t e T o o r i í AND 9QP1d CHMOS COMBINED SINGLE-CHIP PCM CODEC AND FILTER AT&T D3/D4 and CCITT Compatible 29C14 Asynchronous Clocks, 8th Bit Signaling, Loop Back Test Capability 3 Low-Power Modes — 3.5 mW Typical Power Down — 3.5 mW Typical Standby

ADPCM

Abstract: MSM7580 MSM7580GS
Contextual Info: MSM7580 5V ADPCM Transcoder DESCRIPTION The MSM7580 is a single-rail, low-voltage, two-channel ADPCM transcoder which performs bi-directional digital conversion from PCM Pulse Code Modulation serial voice data to ADPCM (Adaptive Differential Pulse Code Modulation) serial data. Serial data rates are 64 Kbps to 2048 Kbps for PCM serial

2911A

Abstract: drc Rotary encoder 12V,5 pin RELAY LIMING RELAY AQRS 2911A-1 g732 2911A-2 G711
Contextual Info: in y 2911A PCM CODEC — A LAW 8-BIT COMPANDED A/D AND D/A CONVERTER 2911A-1 2911A-2 Microcomputer* Mode or Direct Mode Direct Mode Only • 66 dB Dynamic Range, with Resolution Equivalent to 11-Bit Linear Conversion Around Zero ■ ± 5 % Power Supplies: + 12V, + 5V, - 5 V

Contextual Info: /= T * 7 # . S G S -T H O M S O N M5913 COMBINED SINGLE CHIP PCM CODEC AND FILTER • SYN CHRO N O US C LO C K S ONLY ■ AT&T D3/D4 AND C C IT T CO M PATIBLE ■ TW O TIMING M ODES: FIX ED DATA R A TE MODE 1.536MHz, 1.544MHz, 2.048MHz V A R IA B LE DATA MODE: 64KHz - 4.096MHz

tsx 07 nano

Contextual Info: iLBlüDIMÄlRY in t e T 2913 AND 2914 COMBINED SINGLE-CHIP PCM CODEC AND FILTER • 2914 Asynchronous clocks, 8th bit signaling, loop back test capability ■ 2913 Synchronous clocks only, 300 mil package AT&T D3/D4 and CCITT Compatible Low Power HMOS-E Technology:

dx 400

Abstract: BE2000 AQRS 2910A
Contextual Info: in t b l 2910A ^ PCM CODEC - juLAW 8-BIT COMPANDED A/D AND D/A CONVERTER 78dB Dynamic Range, with Resolution Equivalent to 12-Bit Linear Conversion Around Zero Per Channel, Single Chip Codec CCITT G711 and G712 Compatible, ATT T1 Compatible with 8th Bit Signaling

dx 400

Abstract: 2911A-1
Contextual Info: 2911A-1 PCM CODEC—A LAW 8-BIT COMPANDED A/D AND D/A CONVERTER • Per Channel, Single Chip Codec ■ CCITT G711 and G732 Compatible, Even Order Bits Inversion Included ■ Microcomputer Interface with On-Chip Time-Slot Computation ■ Simple Direct Mode Interface When

G711

Abstract: G733
Contextual Info: in te i « ^ 2910A PCM CODEC - juLAW 8-BIT COMPANDED A /D AND D /A CONVERTER 78dB Dynamic Range, with Resolution Equivalent to 12-Bit Linear Conversion Around Zero Per Channel, Single Chip Codec CCITT G711 and G712 Compatible, ATT T1 Compatible with 8th Bit Signaling

TC7988

Abstract: 2SK2158 MARKING J1A transistor WT7 J Fet marking 2 AW marking N00 3250Q
Contextual Info: M O STféïl-f^ jÎJiP: h 37 > v J X ^ M O S Field Effect Transistor r ^ j_ C I E • •fc I ÌK N 2 S K 2 1 5 8 MOS FET r ü iH X -f y 2 S K 2 1 5 8 I Î1.5 V l E l i £ -f U , fÉ ÎŒ T ig B T 't , ÿ 9 Æ3 * J U i ^ M O S F E T T 5* A 'O K -7 - f 'V y

TM5917

Abstract: 2800H 2048M HIGHWAY 08 20 PIN IC PIN DIAGRAM
Contextual Info: SGS-THOMSON * 5 7 M5917 [M 0 lf3 I[L I© ïï[fii® R !]D g t SINGLE CHIP PCM CODEC AND FILTER • A-LAW, 2.048M Hz MASTER CLOCK ■ 300MIL 16-PIN PACKAGE FOR HIGHER LINECARD DENSITY ■ AT&T D3/D4 AND CCITT CO M PATIBLE ■ VARIABLE TIM ING MODE FOR FLEXIBLE

DIGITA ECHO DELAY

Contextual Info: 2913 AND 2914 COMBINED SINGLE-CHIP PCM CODEC AND FILTER • 2913 Synchronous Clocks Only, 300 Mil Package ■ 2914 Asynchronous Clocks, 8th Bit Signaling, Loop Back Test Capability ■ AT&T D3/D4 and CCITT Compatible for Synchronous Operation ■ Pin Selectable jn-Law or A-Law

dx 400

Abstract: 2911A-1
Contextual Info: intei 2911A-1 PCM CODEC — A LAW 8-BIT COMPANDED A/D AND D/A CONVERTER • 66 dB Dynamic Range, with Resolution Equivalent to 11-Bit Linear Conversion Around Zero ■ ± 5 % Power Supplies: +12V, +5V, - 5 V Per Channel, Single Chip Codec ■ CCITT G711 and G732 Compatible,