TTL 74LS138 Search Results

74LS08 fan-in

Abstract: 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245
Contextual Info: Selection Information FAST/LS TTL 1 Circuit Characteristics 2 Design Considerations, Testing and Applications Assistance Form 3 FAST Data Sheets 4 LS Data Sheets 5 Reliability Data 6 Package Information Including Surface Mount 7 FAST AND LS TTL DATA CLASSIFICATION

74LS82

Abstract: 74LS176 74LS94 74LS286 74ls150 74LS177 74LS116 74ls198 7400 TTL 74ls521
Contextual Info: GOULD 4055916 GOULD SEMICONDUCTOR SEMICONDUCTOR DIV DIV 03E D | 03E MDSSTlb 09920 D UCICmEU T-4 3I-V 7400 TTL Cells •> GOULD CM OS Gate Array and Standard Cell Library Electronics Features General Description • Over 200 functions available. 7400 TTL Cells, a member of Gould’s EXPERT ASIC

block diagram of 74LS138 3 to 8 decoder

Abstract: 74LS138 3 to 8 decoder notes block diagram of 74LS138 1 line to 16 line MM74HCT138N mm54hct138/mm74hct138 54LS138 74HCT 74LS138 C1995 MM54HCT138
Contextual Info: MM54HCT138 MM74HCT138 3-to-8 Line Decoder General Description the 54LS138 74LS138 All inputs are protected from damage due to static discharge by diodes to VCC and ground MM54HCT MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS

l381

Abstract: and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138
Contextual Info: y SP74SC138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B • Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CMOS technology ■ Full TTL interface capability

Contextual Info: January 1988 MM54HCT138/MM74HCT138 3-to-8 Line Decoder General Description the 54LS138/74LS138. All inputs are protected from dam­ age due to static discharge by diodes to Vcc and ground. MM54HCT/MM74HCT devices are intended to interface be­ tween TTL and NMOS components and standard CMOS

Contextual Info: LS TTL DN74LS Series DN74LS138 DN74LS138 M 741^ 3^ 3 -lin e to 8 -lin e Decoders / Demultiplexers • Description P-2 D N 74LS138 is a 3-bit decimal to octal decoder/dem ulti­ plexer w ith enable inputs. ■ Features • • Three types o f enable inputs

TTL 74ls138

Contextual Info: SANYO SEM ICONDUCTOR CORP 7 cH 7 a 7 b OOIOERM 57Ô « T S A J S3E ]> T- 6 7 - 2 \-SS MLC74HC138AM CMOS High-Speed Standard Logic 3 to 8-Line Decoder Features • The MLC74HC138AM is 3-to-8 decoders. •Uses CMOS silicon gate process technology to achieve operating speeds similar to LS - TTL 74LS138

74HCT138

Abstract: 74HCT138 DIP 20 PIN LEADLESS CHIP CARRIER EQUIVALENT 74HCT138 IDT74HCT138 54HCT138
Contextual Info: h ig h s p e e d CMOS 1-OF-8 DECODER IDT54/74HCT138 IDT72T33&J FEATURES • • • • • • • • • High speed, comparable to bipolar: 11ns typ. CMOS low power levels: 50 typ. Inputs and outputs directly TTL-compatible Standard 54/74LS138 pinouts Proprietary option 72T338 allows larger memory array

74IS04

Abstract: crt controller 6845 74S393 faraday xt 74IS74 74IS00 6845e crt controller 74832 block diagram of 74LS138 3 to 8 decoder
Contextual Info: 3486347 FARADAY 84D 00245 ELECTRONICS CORP ELECTRONICS INC 04 DEÌ MONOCHROME DISPLAY CONTROLLER FARADAY FE2200 FEATURES: Generates the CRT Display Controller Clock and Other Timing Signals Uses a Crystal or a TTL Signal for Frequency Source Incorporates Complete

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

741S157

Abstract: CI 74LS32 74ls20 14 PIN 74IS00 monochrome display 74IS04 6845e Faraday Electronics DT33C crt controller 6845
Contextual Info: 3486347 FARADAY ELECTRONICS CORP 84D FE2200 FEATURES: Generates the CRT Display Controller Clock and Other Timing Signals Uses a Crystal or a TTL Signal for Frequency Source Incorporates Complete Attribute Decoding Provides I/O Channel Synchronization 68 Pin Leaded Surface Mount

transistor cross reference

Abstract: MPT3N40 Westinghouse SCR handbook LT 8224 ZENER DIODE sje389 N9602N npn transistor RCA 467 TFK 7 segment displays PUT 2N6027 delco 466
Contextual Info: C K TBD DOLLY LIST LOGO LIST SAFETY & RELIABLTY TEK PN SYSTEM II DIGITAL IC's MEMORIES. MOS. CM OS.ECL. TTL MICROPROCESSOR SPECIAL FUNCTION IC's DIGITAL / LINEAR ARRAYS LINEAR IC'S (PURCH) TEK-MADE IC’s 3 IC's INDEX (COLORED PGS) INCL PRGMD. SCRND.ETC

Contextual Info: AD767–SPECIFICATIONS T = +25؇C, ؎15 volt power supplies, Unipolar Mode, unless otherwise noted. A Model AD767J/A/S1 Min Typ Max DIGITAL INPUTS Resolution Logic Levels (TTL Compatible, TMIN–TMAX)3 VIH (Logic “1”) +2.0 VIL (Logic “0”) J, K, A, B

Ic 74hc138 logic diagram

Contextual Info: Revised February 1999 S E M IC Q N D U C T O R T M MM74HC138 3-to-8 Line Decoder The decoder’s outputs can drive 10 low power Schottky TTL equivalent loads, and are functionally and pin equiva­ lent to the 74LS138. All inputs are protected from damage due to static discharge by diodes to V qq and ground.

FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Contextual Info: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL, 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P

74LS138

Abstract: 7443 ttl 74155 ttl 74191 7443 TTL 74ls138 74LS139 74LS191 74ls138 fairchild TTL 74145
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74LS190 PIN diagram

Abstract: presettable digital clock ttl 74191 Fairchild 74190 74LS191 74155 D130 74192 74ls192 pin diagram of 74163
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74191 8 bit

Abstract: D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

pin diagram of 74LS191

Abstract: TTL 7452 74155 74190 74151 74151 PIN DIAGRAM D132 74LS151 Logic DIAGRAM 74ls156 74191 state diagram
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

Contextual Info: h ig h speed c m o s 1-0F-8 DECODER IDT54/74HCT138 IDT72T338| Integrated Device Technology Inc FEATURES • • • • • • • • • High speed, comparable to bipolar: 11ns typ. CMOS low power levels: 50 typ. Inputs and outputs directly TTL-compatible

D133

Abstract: 74ls139 TTL 9334 74LS152 PIN 74LS42 7442 pin diagram 93L01 74156 ttl 74155 D132
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 T12 T11 T10 T9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

pin diagram decoder 74154

Abstract: 74155 decoder 74LS247 TTL 7448 74LS42 cmos decoder 7448 input 16 pin 7SEG COM ANODE 74151 PIN DIAGRAM cI 74150 D133
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74191 8 bit

Abstract: 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8

74LS190 PIN diagram

Abstract: ttl 7442 74LS42 74LS138 pin diagram D134 7442 pin diagram 74155 74145 D133 93L01
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8