TTL40 Search Results

CS 5211

Abstract: XC1704 U2A18 A1529 ALI M16 ID99 b21 a03 aO d07 S234 TTL-45
Contextual Info: A [00:1B] P1 P1 P1 S1-37 AOO TTLO A1 TTL3 A2 51-5 TMS 52-11 CEO TTL1 B1 DV TTL4 B2 D05 D02 51-21 TTL7 B3 5 2- 27 TTL10 B4 A5 51-40 TTL12 B5 AID5 A6 52-2 T T L14 B6 AID4 A7 PVCC B7 AIDO A8 +5V B8 TTL6 A3 TTL9 A4 AID6 AID1 DATA DO See note 5. A9 A 10 AID3 A ll

Contextual Info: ENGINEERED COMPONENTS CO 3ÛE D 33 3 32 A3 0 00 07 b 5 1 *EGC r-äi-n l&pprofilt t 2l COMFATIBLE DIP PULSE GENERATOR MODULE M íní # # # # # T 2 L input and output Pulse w idths stable and precise 8-pin DIP package Available in pulse w idths from 5 to 500ns

MI b11

Abstract: A241 ISA-96 TTL-45
Contextual Info: TTLO TTL3 T TL6 T TL9 AID6 P1 P1 P1 DATA2 A1 DATAI A2 CEO A3 DATAD A4 S I —6 TTL1 S I —16 TTL4 51—13 TTL7 51-1 TTL10 A5 TTL12 TTL2 C1 DATA4 S I —14- TTL5 C2 DATA6 B3 TTL8 C3 B4 TTL11 C4 B2 A6 TTL14 B6 AID4 A7 PVCC B7 AIDO A8 +5V B8 AID1 A9 TTL18 B9

diode s1 77

Abstract: S124 diode s1 diode s1 74 socket s1 S1-100 S1-128
Contextual Info: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 D2 D1 D0 S1-118 S1-110 S1-103 S1-100 TTL1 TTL8 C3 B4 TTL11 C4 TTL13 C5 TTL15 C6 TTL16 C7 TTL17 C8 TTL19 C9 AGND C10 PVCC C11 TTL20 C12 TTL21 C13 TTL22 C14 TTL23 C15 TTL24 C16 TTL25 C17 PVCC C18 TTL26 C19 PVPP C20 TTL28

TL300

Abstract: TL65
Contextual Info: tozu -profile t 2l C O M P A T IB L E Mini Dl LO G IC DELAY DULE _ f # T2L Input and outputs all m odules is 4ns m axim um w hen m easured from 0.8V to # Delays stable and precise 2.0V . T e m p e ra tu re co e fficie n t o f delay is approxim ately +500

FXLDM-TTL-50G

Abstract: FXLDM-TTL-70J FXLDM-TTL-80F FXLDM-TTL-90T rf delay line 45X2 FXLDM-TTL-1000 X7250
Contextual Info: Cozv profile t 2l C O M P A T IB L E „ A 10-TAP LOGIC DELAY MODULE T2L input and outputs Delays stable and precise 8-pin DIP package Leads - thru-hole, J, Gull Wing or Tucked Available in delays from 10 to 500ns # Output and four 4 taps - each isolated and with 10 T2 L fan-out capacity

Contextual Info: surface mount t 2l CO M PATIBLE Wee DIP M U LTI-LO G IC J DELAY LINE # T2 L FAST input and outputs # Delays stable and precise # SO-14 pin pattern # Wee DIP package .235 high # Available in delays from 5 to 250ns — each isolated and with 10 T2L fan-out capacity

Socket S1g1

Abstract: HW-133 XC95144XL S1A13 TTL32 s1d1 TTL-45 s1n6 S1-N13
Contextual Info: A1 D3 TTL3 A2 _D2_ T TL6 A3 T TL9 A4 TTLO AID6 AID5 51—A 1 P1 P1 TTL1 S1-M 13 TTL4 51—NI Z TTL7 S1-H11 TTL10 GND TTL12 A6 TTL14 B1 B6 TCK VCC A8 +5V B8 AID1 A9 TTL18 B9 AID7 A ll TTL44 A 12 AGND A 13 CGND A14 AGND MOUNTI NG HOLES B12 B16 S1-E11 B17 AGND

si111

Abstract: SI-111 S1-V11 S1L-10 HW-133 Socket S1g4 S1B14 TTL-45
Contextual Info: P1 TTLO TTL3 TTL6 TTL9 AID6 AID5 AID4 AIDO AID1 AID2 AID3 AID7 AGND CGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND AGND PVPP P1 A1 A2 A3 A4 A5 A6 A7 A8 A9 _ Q i_ S 1 -P 2 0 J22_ S 1 -V 2 0 D1 S 1 -Y 2 0 J2Ù _ S 1 -Y 1 9

diode t25 4 B9

Abstract: transistor af18 socket s1 diode t25 4 d9
Contextual Info: P1 TTL0 D3 A1 TTL3 A2 TTL6 A3 TTL9 P1 D2 D1 D0 A4 S1-W2 S1-AA4 S1-AD3 S1-AE3 TTL1 P1 D4 B1 TTL4 B2 TTL7 B3 TTL10 B4 AID6 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 +5V B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 S1-U2 S1-R2 D6 TDI TTL2

HW-133-PC68

Abstract: HW-133 S124 socket s1 S1-25 s159 socket s1 a1 a2 61S161 XC7354 MRX TTL-45
Contextual Info: ZONE REV 01 P1 TTL0 TTL3 A2 TTL6 A3 TTL9 A4 AID6 AID5 D3/D0 D2/D4 S1-25 S1-29 S1-28 S1-27 TTL1 B2 TTL7 B3 TTL10 B4 A5 TTL12 B5 A6 TTL14 B6 D1/D3 D0/D2 AID4 A7 PVCC B7 AID0 A8 +5V B8 A9 AID2 AID3 TTL18 B9 A10 AGND B10 A11 TTL44 B11 AID7 A12 AGND B12 AGND A13

S124

Abstract: diode s1 85
Contextual Info: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 D2 D1 D0 S1-57 S1-54 S1-52 S1-51 TTL1 TTL4 B2 TTL7 B3 TTL10 B4 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 PVSP B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 AID7 A12 AGND B12 AGND A13 AGND B13 CGND

HW-133

Abstract: HW-133-PQ44 S124 XC7354 S1-11 XC7354 MRX TTL-45 aid-1
Contextual Info: ZONE REV 01 P1 TTL0 TTL3 A2 TTL6 A3 TTL9 A4 AID6 INITIAL RELEASE PER DCN #6790 P1 D3 A1 D2 CE D1 (OE) S1-11 S1-14 S1-13 S1-12 TTL1 B1 TTL4 B2 D4 (DATA) S1-16 S1-19 D6 TTL2 C1 TTL5 C2 TTL7 B3 TTL8 C3 B4 TTL11 C4 A5 TTL12 B5 TTL13 C5 AID5 A6 TTL14 B6 TTL15

socket s1

Abstract: diode s1 61 diode s1 77 diode s1 85 S124 040 d10 diode s1 diode s1 74 HW-133-PQ160 S1 18
Contextual Info: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 D2 D1 D0 S1-90 S1-82 S1-79 S1-77 TTL1 TTL4 B2 TTL7 B3 TTL10 B4 A5 TTL12 B5 AID5 A6 TTL14 B6 AID4 A7 PVCC B7 AID0 A8 PVSP B8 AID1 A9 TTL18 B9 AID2 A10 AGND B10 AID3 A11 TTL44 B11 AID7 A12 AGND B12 AGND A13 AGND B13 CGND

Contextual Info: Cow profiCe t 2l COM PATIBLE LOW FREQUENCY SOUARE WAVE GENERATOR MODULE # T^L FAST input and output # Output wavetrain can be started with random events # Leads—Thru-hole, J, Gull Wing or Tucked # Available in frequencies from 30kHz to 1MHz # Output frequencies controlled to within ±2%

Contextual Info: Er-2 ENGINEERED COMPONENTS :CO 73 c D E I 33332Ö3 OODDSbT 7 i~* TSo-zl lowprofile t 2l COMPATIBLE FREQUENCY 1« SQUARE WAVE GENERATOR MODULE ^ _ T 2 l input and output O utput wavetrain can be started in sync with random events 14-pin DIP package .240 high

XC95108XL

Abstract: si122 ISA-96 HW-133 RH A4 130 XC95144XL IS9B TTL-45 SI-122
Contextual Info: P1 P1 TTLO TTL3 TTL6 TTL9 AID6 AID5 _Q3_ A1 A2 A3 A4 5 1-B O _Q2_ 5 1 -7 4 DI 5 1 -7 1 _BD_ S I— 69 TT L1 TTL4 TTL7 TTL10 GND A5 TTL12 A6 TTL14 P1 5 1 -8 2 TTL2 5 1 -8 7 TTL5 C2 B3 TTL8 C3 B4 TTL11 C4 B7 AI DO A8 +5V B8 AID1 A9 TTL18 B9 AID3 AID7 All TTL44

9536XL

Abstract: HW-133 HW-133-VQ64 A2 5160 64-pin VQFP xc9572xl TTL-45 ISA-96
Contextual Info: A1 D3ÍA11 A2 D2 A1D) A3 Dlf A9Ì TTL9 A4 DO(AB) AID6 A5 TTLO TTL3 TTL6 P1 P1 P1 S I—24S1-22 GND B2 D6(D1) S1-35 TTL5 C2 B3 TTL8 C3 TTL10 B4 TTL11 C4 TTL12 B5 TTL13 C5 TTL15 C6 TTL16 C7 T TL7 S I—19 D4ÍA12) TTL2 T T L4 S1-20 B1 S1-25 TTL1 AID5 A6 TTL14

Contextual Info: tozo profile t 2l COMPATIBLE SIP LOGIC DELAY UNE M ìn ì > # Available in delays from 5 to 500ns T h e M S F L D L -T T L is offered in 4 8 delays from 5ns to 500ns. Delay tolerances are m aintained as shown in the accompanying part num ber table, w hen tested under the "Test Conditions” shown. Delay

Manufacturer Logos

Contextual Info: ENGINEERED COMPONENTS CO Ib E D 33-3320.3 00Q G 7D4 T 'T LS D -0 ° \ lowprofile t 2l COMPATIBLE ADJUSTABLE SOUARE WAVE GENERATOR • 9 ® ® • T^L input and outputs Output wavetrain can be Started in sync with random events 14-pin DIP package .260 high

Contextual Info: lozu profite t 2l COMPATIBLE 10-TAP tO G IC DELAY MODULE # T2L input and outputs # Delays stable and precise # 14-pin DIP package time is measured at the +1.5V level on the leading edge. Rise time for all modules is 4ns maximum when measured from 0.8V to 2.0V. Temperature coefficient of delay is approxi­

Contextual Info: Cozi> p r o f i t t 2l COMPATIBLE Mini DIP FREQUENCY ER MODULE # T2L FAST input and outputs # Output wavetrain synchronized with input square wave # 8-pin DIP package The MDFDFMM-TTL is offered in thirty-eight 38 standard clock frequencies from 2 MHz to 100 MHz. When tested under the "Test

S124

Contextual Info: P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 A3 TTL9 A4 AID6 D2 D1 S1-31 S1-33 S1-36 S1-37 TTL1 P1 D4 B1 TTL4 B2 S1-30 S1-27 D6 TTL2 C1 TTL5 C2 TTL7 B3 TTL8 C3 TTL10 B4 TTL11 C4 A5 TTL12 B5 TTL13 C5 AID5 A6 TTL14 B6 TTL15 C6 AID4 A7 PVCC B7 TTL16 C7 AID0 A8 +5V B8 TTL17

SO8 DIP8 socket

Abstract: DIP8 socket HW-137-DIP8 bin to hex TTL-30 TTL-45 dead bug socket A21 SO8
Contextual Info: ZONE P1 REV 01 INITIAL RELEASE PER DCN #6629 3/27/95 02 CHANGED PER DCN #7044 6/27/95 03 CHANGED PER DCN #0100160 11/04/96 P1 A1 TTL1 B1 TTL2 C1 TTL3 A2 TTL4 B2 TTL5 C2 TTL6 A3 TTL9 A4 AID6 S1-14, S2-6, S3-6 S1-2, S2-1, S3-1 TTL7 B3 TTL8 C3 TTL10 B4 TTL11