TWFC Search Results

74LS90 pin configuration

Abstract: configuration 74ls90
Contextual Info: SPEED/PACKAGE AVAILABILITY 54 F,W S4LS F,W BLOCK DIAGRAM 54LS/74LS PIN CONFIGURATION 74 A,F 74LS A,F DESCRIPTION This monolithic counter contains four mas­ ter-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the

Contextual Info: IDT71321SA/LA HIGH SPEED IDT71421SA/LA 2K X 8 DUAL-PORT STATIC RAM WITH INTERRUPTS F eatures ♦ MASTER IDT71321 easily expands data bus width to 16-or- ♦ High-speed access IDT71321/IDT71421SA more-bits using SLAVE IDT71421 ♦ On-chip port arbitration logic IDT71321 only

TMS7000 instruction set

Abstract: TMS27256 TMS7000 1037h 1059h PC 1037H T1103 TMS370C156 TMS370 TMS7000 Family Data Manual
Contextual Info: TM S 370G x5x 8-BIT MICROCONTROLLERS D E C E M B E R T 9 8 6 — R E V IS E D N O V E M B E R 13SS CMOS/EEPROM/EPROM Technology — EEPROM Programming Via Single 5-V Supply — EPROM Programming Via External 12-V Supply FN AND FJ PACKAGES TOP VIEW r w CN -­

Round pulse transformer

Abstract: CRC16 D77D 89C3 13,56 mhz antenna D7-1C 9bcd
Contextual Info: SL2 ICS12 Functional Specification I•CODE UID-OTP Smart Label IC Rev. 03.00 — 6 December 2006 Product data sheet 127730 public 1. General description The I•CODE UID-OTP Smart Label IC is a dedicated chip for radio frequency identification on item level. This IC is a member of the well known and established in the

Contextual Info: • MJESSEY S E M IC O N D U C T O R S PDSP16256 / A PROGRAMMABLE FIR FILTER S U P E R S E D E S M A R C H 1990 ED ITIO N The PDSP16256/A contains sixteen multiplier - accumu­ lators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. It accepts 16 bit data and coefficients,

Contextual Info: TMX320C6201 DIGITAL SIGNAL PROCESSOR SPRS051B - JANUARY 1997 - REVISED JUNE 1997 Highest Performance Fixed-Point Digital Signal Processor DSP : GGP 352-PIN BGA PACKAGE (BO TTO M V IE W ) I 26 o o o o o o o o o o o o o o o o o o o o o o o o o o - 1 600 MIPS @ 200 MHz

Contextual Info: IDT74FST3125 4-BIT BUS SWITCH ï r t e g i a t e d D e v iæ T e c h n o lo g y , ]n c The FST3125 belong to IDT's fam ily of Bus switches. Bus switch devices perform the function of connecting or isolating tw o ports w ithout providing any inherent current sink or source

ansi y14.5m-1982 .xxxx

Abstract: diode chn 115
Contextual Info: :nW J d t In te g ra te d D e v ic e T e c h n o lo g y , Inc. 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE) FEATURES: • 0.5 MICRON CMOS Technology • Input frequency range: 10MHz - f2Q Max. spec (F R E Q S E L = HIGH) • Max. output frequency: 150MHz

2SC3865

Abstract: 5bhii
Contextual Info: 2SC3865 ± ' < TJ - Y 17 > Ì > X 9 N P N = B t e i J [ 7 °U— - t M TR IP LE D IF F U S E D PLANER TYPE «HE. HIGH VOLTAGE, HIGH SPEED SWITCHING • It 'S : F e a tu re s • ftW/±, • ft jfH ii High voltage, high speed switching High reliability ! A p p lic a t io n s

Contextual Info: SN54190, SN54191, SN54LS190, SN54LS191, SN74190, SN74191, SN74LS190, SN74LS191 SYNCHRONOUS UPIDOWN COUNTERS WITH DOWN/UP MODE CONTROL DECEMBER 1 9 7 2 -R E V IS E D M AR C H 1 9 8 8 Counts 8-4-2-1 BCD or Binary SN54190, SN54191, SN54LS190, SN54LS191 . . . J PACKAGE

Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

Contextual Info: The revision list summarizes the locations of revisions and additions. Details should always be checked by referring to the relevant text. 32 SH7203 Group User's Manual: Hardware Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family / SH7200 Series

28C010-120

Abstract: 28C0102 28C010 400103 28C010-200
Contextual Info: 28C010 1024K High Speed EEPROM EEPROMS Technology, Incorporated July 1992 Features • Military, Extended and Commercial Temperature Rangea • S 5 °C to +125°C Operation Military . -40°C to +85°C Operation (Extended) • 0°C to +70°C Operation (Commercial)

Contextual Info: ¿ A m bSH^a 0037377 043 m Mitsubishi microcomputers M30201 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER & Description Description The M30201 group of single-chip microcomputers are built using the high-performance silicon gate CMOS process using a M16C/60 Series CPU core. M30201 group is packaged in a 52-pin plastic molded SDIP, or

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

DM74367

Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
Contextual Info: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,

Contextual Info: O K I Semiconductor MSM5260 8Q-DOT COMMON/SEGMENT DRIVER GENERAL DESCRIPTION The MSM5260 is a dot m atrix com m on/segm ent LCD driver LSI w hich is fabricated by low pow er CMOS metal gate technology. This LSI consists of 80-bit shift register, 80-bit latch, 80-bit

D771C

Contextual Info: PANASONIC INDL/ELEK -CIO 72 6 9 3 .2 8 5 2 P A N A S O N IC I E~| [^32052 OOOTOTD D | " I N D L * E L E C T R O N IC 72C LS TTL DN74LS^U— X D N 7 4 L S 1 6 5 07090 0 T « * 4 U « M .h C dn74lsì65/dn74lsi65S D N 7 4 L S 16 5 S Parallel Load 8—bit Shift R egisters

PPG SENSOR

Abstract: smd marking code ad14 AGND11 SAA8113HL marking AWBF smd code marking NEC 817 TCD5381AP sharp display 5,7" 80C654 TDA8786
Contextual Info: INTEGRATED CIRCUITS DATA SHEET SAA8113HL Digital PC-camera signal processor Preliminary specification File under Integrated Circuits, IC22 1999 Sep 27 Philips Semiconductors Preliminary specification Digital PC-camera signal processor CONTENTS 1 FEATURES 2

SC28L92A18

Abstract: QP 3.686 MHZ zdw mark
Contextual Info: S M P \ iH E E SC28L92 Dual Universal Asynchronous Receiver/Transmitter DUART 1998 Oct 05 Preliminary specification ÏC19 Data Handbook Philips Semiconductors PHiUPS PHILIPS Philips Semiconductors Preliminary specification Dual Universal Asynchronous Receiver/Transmitter (DUART)

74ls45

Abstract: SEEQ EDLC
Contextual Info: Advanced Ethernet Data Link Controller AEDLC Technology, Incorporated May 1992 Features • Conforms to IEEE 802.3 Standard • Ethernet (10BASE-S) Cheapernet (10BASE-2) and Twisted Pair (10BASE-T)

Contextual Info: HIGH-SPEED 3.3V 32K x 8 DUAL-PORT STATIC RAM PRELIMINARY IDT70V07S/L F e a tu re s True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed access ♦ - ♦ Commercial: 25/35/55ns max. Low-power operation -

Contextual Info: HIGH SPEED 4K X 8 DUAL-PORT STATIC RAM WITH SEMAPHORE D e sc rip tio n F e a tu re s • High-speed access - Commercial: 20/25/35/45/55/70ns max. • Low-power operation - IDT71342SA Active: 700mW(typ.) Standby: 5m W (typ.) - ID T 7 1 3 4 2 S A /L A IDT71342LA

TMS44C256

Abstract: TMS44C256-10 bojf tms44c251
Contextual Info: • a ^ L lT S S Q O T b 'n ? Q ■ TMS44C256, TMS44C257 262,144-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES INSTR 2 SE ASIC/MEMORY N PACKAGE (TOP VIEW) 262,144 x 4 Organization Single 5-V Supply (10% Tolerance) DQlC 1 Ü 20 ]Vss DQ2[ 2 193 004 wC 3 18 ]DQ3