TXC 9513 Search Results

apar c06 100 104

Contextual Info: BACK DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating VT1.5 Byte Synchronous mapping for

AADD

Abstract: XPS-AS GR-253-CORE GR253-CORE GR-499-CORE FPS-310 sot 23 mark AD
Contextual Info: DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating VT1.5 Byte Synchronous mapping for

Contextual Info: tmän S w it c h „ DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B x- DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating V T1.5 Byte Synchronous mapping for

tsm04

Abstract: 100BASE-FX ML6695 rsm capacitor rxc 151
Contextual Info: December 1998 PRELIMINARY ML6695 100BASE-X Fiber Physical Layer With 5-bit Interface GENERAL DESCRIPTION FEATURES The ML6695 implements the physical layer of the Fast Ethernet 100BASE-X standard for fiber media. The device provides the 5-bit or symbol interface for interface to

TCFR10

Abstract: 44-PIN MC68836 ML6673 ML6691 MDIO MDC
Contextual Info: March 1997 ML6691* 100BASE-T MII-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and

Contextual Info: MAX14821 IO-Link Device Transceiver General Description The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

MAX14820

Abstract: IO-Link ILDO33 max17501 SDC36C PLDO33
Contextual Info: 19-5787; Rev 5; 7/12 EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description Features The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

Contextual Info: EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

Contextual Info: March 1997 ML6691 100BASE-T MII-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and

Contextual Info: 19-5916; Rev 2; 7/12 MAX14821 IO-Link Device Transceiver General Description Features The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

ST6129

Abstract: XCMP100
Contextual Info: May 1997 ML6694 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6694 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6694 is well suited for

XCMP100

Abstract: RSM09 mlt resistor ITD-10 ML6698 MX98713 TXC 8W bel TRANSFORMER ST6129
Contextual Info: May 1997 ML6698* 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6698 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6698 is well suited for

Contextual Info: 19-5916; Rev 2; 7/12 MAX14821 IO-Link Device Transceiver General Description Features The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

Contextual Info: 19-5916; Rev 2; 7/12 MAX14821 IO-Link Device Transceiver General Description Features The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

Contextual Info: 19-5787; Rev 5; 7/12 EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description Features The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

MLT 22 50

Abstract: mlt resistor ML6694 nrzi circuit diagram MLT-3 XCMP100 h441
Contextual Info: May 1997 ML6694* 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6694 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6694 is well suited for

but16

Abstract: physical layer interface
Contextual Info: PR ELIM INA R Y f y P E R I C O M PI2C3020 .

Contextual Info: 19-5787; Rev 5; 7/12 EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description Features The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface

TIL112

Abstract: BUT16
Contextual Info: PRELIMINARY Token Ring Active Retiming Hub Interface Chip Product Features: • Constant gain digital PLLs for data retiming • Complete physical layer interface for 4/16 Mbps Token Ring Concentrator • Phantom voltage detection/generation for lobe port

ME6691

Contextual Info: March 1997 % M i c r o Linear ML6691 100BASE-T M II-to-PM D Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 1OOBASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/

rsm ah 16

Abstract: 0224a ic Accessible Local code
Contextual Info: mÉL Micro June 1995 PRELIMINARY Linear ML6691 100BASE-T MII-to-PMD Transceiver G EN ERA L D ESCR IPTIO N FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/

RX-4M

Abstract: physical layer interface BUT16
Contextual Info: PRELIMINARY fu P E R IC O M Token Ring Physical Layer Interface Chip Product Features • Complete DTR/STR physical layer interface for 4/16 M bps Token Ring application for UTP/STP

Contextual Info: June 1995 PRELIMINARY ^ÉkMicro Linear ML6691 100BASE-T MIl-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 10OBASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/

10BASE-T

Abstract: TSM 30 CK 1200
Contextual Info: M ay 1997 % M ic r o Linear ML6698 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6698 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6698 is well suited for