ULTRA37192V Search Results

ULTRA37192V Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
Ultra37192V		Cypress Semiconductor	UltraLogic High-Performance CPLDs	Original	PDF	134.66KB	7

ULTRA37192V Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
tlp 453 Contextual Info: fax id: 6151 PRELIMINARY Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant	Original	Ultra37192V 192-Macrocell IEEE1149 tlp 453	PDF
Contextual Info: Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD Features — tpD = 12 ns — ts = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6 .5 ns • Product-term clocking — 3.3V ISR • IEEE1149.1 JTAG boundary scan	OCR Scan	Ultra37192V 192-Macrocell IEEE1149 16ctor	PDF
ncl016 Contextual Info: •gg P R E L IM IN A R Y ^^^B88888888888888888888SSi^ Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 n s • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6.5 ns Product-term clocking	OCR Scan	B88888888888888888888SSi^ Ultra37192V 192-Macrocell IEEE1149 160-pin ncl016	PDF
Contextual Info: fax id: 6151 CYPRESS UltraLogic 3.3V 192-Macrocell ISR™ CPLD PRELIMINARY Ultra37192V — t PD = 12 ns Features — ts = 6 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 7 ns Product-term clocking IEEE1149.1 JTAG boundary scan	OCR Scan	192-Macrocell Ultra37192V IEEE1149 160-pin	PDF
CY37256VP160-100AC Abstract: h jtag Contextual Info: fax id: 6149 PRELIMINARY Ultra37256V UltraLogic 3.3V 256-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — 3.3V ISR — tCO = 6.5 ns Product-term clocking IEEE1149.1 JTAG boundary scan	Original	Ultra37256V 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37192V Ultra37128V CY37256VP160-100AC h jtag	PDF
Contextual Info: fax id: 6149 CYPRESS UltraLogic 3.3V 256-Macrocell ISR™ CPLD PRELIMINARY Ultra37256V — t PD = 12 ns Features — ts = 6 ns • 256 macrocells in sixteen logic blocks • IEEE standard 3.3V operation — tco = 7 ns — 3.3V ISR — 5V tolerant • 3.3V In-System Reprogram mable ISR™	OCR Scan	256-Macrocell Ultra37256V IEEE1149	PDF
Contextual Info: CYPRESS PRELIMINARY Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD — tco = 4.5 ns Features Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual l/Os Low power option on individual logic block basis 5V and 3.3V I/O capability	OCR Scan	Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37192V, Ultra37128/37128V, Ultra37256/37256V, CY7C375i	PDF
TEA 1112 A Abstract: TCS101 Contextual Info: Ultra37192 UltraLogic 192-Macrocell ISR™ CPLD Features — tco = 4 .5 ns • Product-term clocking • 192 macrocells in twelve logic blocks • In-System Reprogrammable™ ISR™ — JTAG-compliant on-board programming — Design changes d on’t cause pinout changes	OCR Scan	Ultra37192 192-Macrocell IEEE1149 160-pin Ultra37192V, Ultra37128/37128V, Ultra37256/37256V, CY7C375ctor TEA 1112 A TCS101	PDF