UNIVERSAL Search Results

A1619A

Abstract: b1241
Contextual Info: SN54ABT32318, SN74ABT32318 18-BIT TRI-PORT UNIVERSAL BUS EXCHANGERS SCBS180A-JUNE 1 9 9 2 - REVISED JULY 1994 Members of the Texas Instruments Wldebus+ Family State-of-the-Art EPIC-IlB™ BICMOS Design Significantly Reduces Power Dissipation Typical V q l p Output Ground Bounce

TTL74194

Abstract: TC40H194P
Contextual Info: TOSHIBA INTEGRATED CIRCUIT TECHNICAL DATA P / F 1 r / I T P d n U I Q A I U T U il l i n TC40H194 C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4-B IT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER The TC40H194 is a 4-bit bidirectional bit register, which permits right shift in the direc­

A3Z03

Abstract: SN74AS856
Contextual Info: SN54AS856, SN74AS856 8 BIT UNIVERSAL TRANSCEIVER PORT CONTROLLERS D 2 B 1 4 , DEC EM BE R 1 9 8 3 - R E V IS E D M A R C H 1 9 8 5 • Included Among the Package Options are Com pact, 24-P in, 300-m il-W ide DIPs and Both 28-Pin Plastic and Ceramic Chip Carriers

CO2V

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW ÖEÄE [ LEAB [ A1 [ GND [ A2 [ A3 [ EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process

54HC299

Abstract: texas instruments UFN 450
Contextual Info: SN 54H C 299, SN74H C299 8 BIT UNIVERSAL SHIFTfSTORAGE REGISTERS W ITH DIRECT CLEAR AND 3-STATE OUTPUTS D 2684. DECEMBER 1982-REVISED SEPTEMBER 1987 Multiplexed I/O Ports Provide Improved Bit Density S N 5 4 H C 2 9 9 . . . J P AC K A G E S N 7 4 H C 2 9 9 . . . D W OR N P AC KA G E

Contextual Info: SN54ABT16501, SN74ABT16501 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS _ SCBS086C - FEBRUARY 1991 - REVISED JANUARY 1997 Members of the Texas Instruments Widebus Family SN54ABT16501 . . . W D PACKAGE SN74ABT16501 . . . DGG OR DL PACKAGE

Contextual Info: SN74ALVC16601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS JANUARY 1993 DGG OR DL PACKAGE TOP VIEW UBT (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Mode

LS299

Contextual Info: SN74ALS299, SN74ALS323 SN54ALS299 SN54ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS D 2 6 6 1 , D E C E M B E R 198 2 - R E V IS E D M A Y 19 8 6 SN 54ALS' s o £ 1 G lC 2 19 : s G 2 E 3 18 ] S L /Q g C 4 17 D Q h ' /q e L 5 16 3 h /q h

Contextual Info: SN54GTL1655, SN74GTL1655 16-BIT LVTTL TO GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION SCBS696C - JULY 1997 - REVISED MAY 1998 Members of the Texas Instruments Widebus Family SN74G TL1655 . . . DGG PACKAGE TOP VIEW Translate Between GTL/GTL+ Signal Level

SN74ALVC16601

Contextual Info: SN74ALVC16601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS264 - JANUARY 1993 - REVISED MARCH 1994 | • Member of the Texas Instruments Wldebus Family • UBT™ Universal Bus Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent,

voltage regulator 9V to 3,3V

Contextual Info: y UCC3981 UNITRODE PRELIMINARY Universal Serial Bus Hot Swap Power Controller FEATURES DESCRIPTION • Fully USB Compliant The UCC3981 Hot Swap Power Controller is designed to provide a self powered USB hub with a local 3.3V regulated voltage and four 5V regu­

TMP68661

Contextual Info: TOSHIBA UC/UP S4E D • c]0,ì 7 2 4 Iì G 0 5 4 G 7 5 TO SHIBA Ö24 * T 0 S 3 TM P68661 1. INTRODUCTION - r - is - 3 1 - a n The TMP68661 enhanced program m able communications interface (EPCI) is a universal synchoronous/asynchronous data communications controller chip th at is an

Contextual Info: SN54ALS323, SN74ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS SDAS267A- DECEMBER 1982 - REVISED DECEMBER 1994 SN54ALS323. . . J PACKAGE SN74ALS323. . . DW OR N PACKAGE TOP VIEW Multiplexed I/O Ports Provide Improved Bit

51132L

Contextual Info: SN54F299, SN74F299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS D2932, MARCH 1987-REVISED JANUARY 1989 Four Modes of Operation: Hold Store , Shift Right, Shift Left, and Load Data SN 54F299 . . . J PACKAGE SN 74F299 . . . DW OR N PACKAGE (TOP VIEW!

Contextual Info: TYPES SN54ALS323, SN54AS323 SN74ALS323, SN74AS323 8 BIT UNIVERSAL SHIFTfSTORAGE REGISTERS WITH 3 STATE OUTPUTS D 2 6 6 1 . DECEMBER 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 Multiplexed I/O Ports Provides Improved Bit Density SN 54A LS ’, S N 54A S ' . . J PACKAGE

frequency dividers

Abstract: Brushless Motors
Contextual Info: Motor Controls Phase Locked Controllers UC1633 Phase Locked Controller The UC1633 family of Phase Locked Controllers are com plete phase locked frequency control sys­ tems. While designed as precision speed control systems for DC motors, these devices are universal

a1310a

Contextual Info: SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS _ _ SCBS165A-AUGUST 1 9 9 3 - REVISED AUGUST 1994 Members of the Texas Instruments

Contextual Info: SN74ALVC16500 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS S C A S 2 6 0 - J A N U A R Y 19 93 - R E V I S E D M A R C H 1994 • Member of the Texas Instruments Wldebus Family • Designed to Facilitate Incident-Wave Switching for Line Impedances of 50 il

sc filter ic mf10

Abstract: TLC20CN MF10C xq200
Contextual Info: TLC10/MF10A, TLC20/MF1 OC UNIVERSAL DUAL SWITCHED CAPACITOR FILTER D2952, AUGUST 1 9 8 6 -R E V IS E D NOVEMBER 1988 Maximum Clock to Center-Frequency Ratio Error TLC10 . . i ± 0.6% TLC20 . . . ± 1.5% N DUAL-IN-LINE PA CKAG E TO P VIEW I 1LP □ 1 L J 2 0 ] 2 L P

Contextual Info: SN54ALS857, SN74ALS857 HEX 2-T0-1 UNIVERSAL MULTIPLEXERS WITH 3-STATE OUTPUTS _ SPAS170A- DECEMBER 1962 - REVISED JANUARY 1996 Select True or Complementary Data Perform AND/NAND Masking of A or B Operand Cascadable to Expand Number of Operands Detect Zeros on A or B Operands

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS S C A S 263- JANUARY 1 9 9 3 - REVISED MARCH 1994 | • Member of the Texas Instruments Widebus Family • UBT™ Universal Bus Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation In Transparent,

Contextual Info: SN74ALVCH16835 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS SCES053F – SEPTEMBER 1995 – REVISED OCTOBER 2000 D D D D Member of Texas Instruments’ Widebus  Family Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model A114-A

Contextual Info: SN74AVC32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES272C – APRIL 1999 – REVISED – AUGUST 1999 D D D D Member of the Texas Instruments Widebus+  Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process UBT  (Universal Bus Transceiver)

Contextual Info: SN74FB1650 18-BIT TTL/BTL UNIVERSAL STORAGE TRANSCEIVER SCBS178K – AUGUST 1992 – REVISED AUGUST 1999 D D D D Compatible With IEEE Std 1194.1-1991 BTL TTL A Port, Backplane Transceiver Logic (BTL) B Port Open-Collector B-Port Outputs Sink 100 mA BIAS VCC Minimizes Signal Distortion