VTR 275 K20 Search Results

Contextual Info: April 1997 PBL 3796, PBL 3796/2 Subscriber Line Interface Circuit Description Key Features PBL 3796 is an analog Subscriber Line Interface Circuits SLICs , which are fabricated in a 75 V bipolar, monolithic process. The programmable battery feed is resistive with short-loop current limiting. A

vtr 275 k20

Abstract: simple and working circuit for ac-dc voltage regulator using SCR 1n4448 diode pbl3799n 3799
Contextual Info: PBL April3799 1997 PBL 3799, PBL 3799/2 Subscriber Line Interface Circuit Description Key Features PBL 3799 is an analog Subscriber Line Interface Circuit SLIC , which is fabricated in a 75 V bipolar, monolithic process. The programmable, resistive feed circuit incorporates a switch mode regulator to

diode 1N4448

Abstract: driver e8a
Contextual Info: ERICSSO N ^ Aprii 1997 PBL 3799, PBL 3799/2 Subscriber Line Interface Circuit Description Key Features PBL 3799 is an analog Subscriber Line Interface Circuit SLIC , which is fabricated in a 75 V bipolar, monolithic process. The programmable, resistive feed circuit incorporates a switch mode regulator to

MB86276

Abstract: MB8627 MB86833 MD10 V832 YUV422 XC9572XL-TQ100 cid wok
Contextual Info: MB86276 <LIME> Graphics Display Controller Specifications Revision 1.0 18th October, 2006 Copyright FUJITSU LIMITED 2004-2006 ALL RIGHTS RESERVED FUJITSU CONFIDENTIAL <Notes> The specifications in this manual are subject to change without notice. Contact our Sales Department

MB86276

Abstract: A4W14 rgb 8 bit to lvds SCALER
Contextual Info: MB86276 'LIME' Graphics Display Controller Specifications Revision 1.20 19th July, 2011 Copyright FUJITSU LIMITED 2004-2007 ALL RIGHTS RESERVED FUJITSU CONFIDENTIAL Notes The specifications in this manual are subject to change without notice. Contact our Sales Department

diode 1N4448

Abstract: transistor zs 65t ETO thyristor sm 4109 nf2 -12V RELAY Relay RL1, 5V, 100 ohm Nytronics MIS
Contextual Info: ERICSSON g April 1997 PBL 3796, PBL 3796/2 Subscriber Line Interface Circuit Description Key Features PBL 3796 is an analog Subscriber Line Interface Circuits SLICs , which are fabrica­ ted in a 75 V bipolar, monolithic process. The programmable battery feed is resistive with short-loop current limiting. A

M28N-1

Abstract: 0X000
Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8158 Rev. 0, 11/2011 MSC8158 Six-Core Digital Signal Processor • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache, unified 512 Kbyte L2 cache configurable as M2 memory in

rc16 e11

Abstract: MDQ-30 ddr3 pinout MDQ35
Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8158E Rev. 0, 11/2011 MSC8158E Six-Core Digital Signal Processor with Security • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache,

Contextual Info: P1013 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1013 feature set: • One High-performance 32-bit e500v2 Core that Implements the Power Architecture Technology: • 36-bit Physical Addressing

Contextual Info: P1022 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1022 feature set: • Two High-performance 32-bit e500v2 Cores that Implement the Power Architecture Technology: • 36-bit Physical Addressing

Contextual Info: P1013 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1013 feature set: • One High-performance 32-bit e500v2 Core that Implements the Power Architecture Technology: • 36-bit Physical Addressing

DDR3 timing diagram

Contextual Info: P1022 QorIQ Integrated Processor Hardware Specifications Datasheet - Preliminary The following list provides an overview of the P1022 feature set: • Two High-performance 32-bit e500v2 Cores that Implement the Power Architecture Technology: • 36-bit Physical Addressing

10-lane serdes

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: MSC8157 Rev. 1, 12/2012 MSC8157 MSC8157 Six-Core Digital Signal Processor • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 KB L1 instruction cache, 32 KB L1 data cache, unified 512 KB L2 cache configurable as M2

Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8157E Rev. 1, 10/2013 MSC8157E Six-Core Digital Signal Processor with Security • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache,

10-lane

Abstract: 10-lane serdes MDQ35 RGMII to SGMII
Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8157E Rev. 0, 11/2011 MSC8157E Six-Core Digital Signal Processor with Security • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache,

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: MSC8157 Rev. 3, 12/2013 MSC8157 MSC8157 Six-Core Digital Signal Processor • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 KB L1 instruction cache, 32 KB L1 data cache, unified 512 KB L2 cache configurable as M2

MSC8157SVT1000A

Abstract: 10-lane 10-lane serdes
Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8157 Rev. 0, 11/2011 MSC8157 Six-Core Digital Signal Processor • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache, unified 512 Kbyte L2 cache configurable as M2 memory in

mdq53

Abstract: ddr3 pinout MSC8157 10-lane serdes 10-lane
Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8157_1_2G Rev. 0, 12/2011 MSC8157 1.2 GHz Six-Core Digital Signal Processor • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache,

Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC8157E Rev. 2, 12/2013 MSC8157E Six-Core Digital Signal Processor with Security • Six StarCore SC3850 DSP subsystems, each with an SC3850 DSP core, 32 Kbyte L1 instruction cache, 32 Kbyte L1 data cache,

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: P1010EC Rev. 4, 05/2014 P1010 P1010 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1010 feature set: • High-performance 32-bit Book E-enhanced core based on

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: P1014EC Rev. 4, 05/2014 P1014 P1014 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1014 feature set: • High-performance 32-bit Book E-enhanced core based on

freescale p1013

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1013EC Rev. 2, 9/2013 P1013 P1013 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1013 feature set: • One high-performance 32-bit e500v2 core that implements

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1022EC Rev. 2, 9/2013 P1022 P1022 QorIQ Integrated Processor Hardware Specifications The following list provides an overview of the P1022 feature set: • Two high-performance 32-bit e500v2 cores that implement

QorIQ dhrystone

Contextual Info: Freescale Semiconductor Data Sheet: Technical Data Document Number: P1023 Rev. 1, 05/2013 P1023 P1023 QorIQ Integrated Processor Data Sheet The following list provides an overview of the chip’s feature set: • High-performance 32-bit Book E-enhanced cores that