X 1018 Search Results

Contextual Info: Revised May 2001 1027 1028 1031 1032 X X X X X X Driver X Receiver X X X X 1532 1019 X 5.0V Supply 1531 1018 3.3V Supply 1017 LVDS Product Feature Matrix X X X X X 3.5mA Drive X X X X X X X X X Power Off Protection X X X X X X X X X Flowthrough Pinout X X

Contextual Info: PLL Product Specification Model: Parameter Frequency Range - PLL300-1018 Rev: A Date: 4/17/2003 SIRENZA Customer: MICRODEVICES, INC. AppNote: 113 Option 207000 Operating Temperature Range: -35 ° to 85 ° C Min Typ Max Units X 1000 1018 1036 MHz X kHz X

MA 1018

Abstract: PLL300-1018 VARIL PLL 1036 0002
Contextual Info: PLL Product Specification Model: PLL300-1018 Rev: A Customer: VARI-L COMPANY Operating Temperature Range: Parameter Frequency Range - Min Typ Max Units X 1000 1018 1036 MHz X kHz X Step Size - 200 Settling Time - to within 1.0 kHz 0.4 0.5 mSec 7 10 dBm -90

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5604BC Rev. 12, 04/2014 MPC5604B/C MAPBGA–225 QFN12 144 LQFP ##_mm_x_##mm 208 MAPBGA 15 mm x 15 mm 17 x 17 x 1.7 mm MPC5604B/C SOT-343R ##_mm_x_##mm 100 LQFP (14 x 14 x 1.4 mm)

C4558

Abstract: C4557 c4554 c455 CY7C455 CY7C456 CY7C457 c4556 C4559 CY7C447
Contextual Info: fax id: 5408 1CY 7C45 7 CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags Features Functional Description • High-speed, low-power, first-in first-out FIFO memories • 512 x 18 (CY7C455) • 1,024 x 18 (CY7C456)

Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5604BC Rev. 10, 11/2012 MPC5604B/C MAPBGA–225 QFN12 144 LQFP ##_mm_x_##mm 208 MAPBGA 15 mm x 15 mm 17 x 17 x 1.7 mm MPC5604B/C SOT-343R ##_mm_x_##mm 100 LQFP (14 x 14 x 1.4 mm)

C90LC

Abstract: MPC5602 MPC5604PE MPC560 MPC5603 MPC5604PEF MPC5602PEF MPC560xp freescale
Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5604P Rev. 1, 8/2008 MPC560xP MPC560xP Microcontroller Data Sheet MAPBGA–225 QFN12 15 mm x 15 mm 14 x 14 x 1.4 mm ##_mm_x_##mm LQFP100 LQFP144 (20 x 20 x 1.4 mm) 32-bit Power Architecture based MCU for

Contextual Info: Rev: 063008 DS3 3 X 1 6 2 /DS3 3 X 1 6 1 /DS3 3 X 8 2 /DS3 3 X 8 1 / DS3 3 X 4 2 /DS3 3 X 4 1 /DS3 3 X 1 1 /DS3 3 W4 1 /DS3 3 W1 1 Et he r ne t Ove r PDH M a pping Devic e s Ge ne ra l De sc ript ion The DS33X162 family of semiconductor devices extend 10/100/1000Mbps Ethernet LAN segments by

LTS23305

Abstract: HP 5082-7653 LTD-585G CSS-517Y LTD482RC CSM-57442E HDSP-3403 MAN3920A LTS-4540-AG tdso 5160 k
Contextual Info: Cross Reference For detailed comparison, please always refer to m anufacture r's specs Manufacturer Part Number CSC P/N A B C HP 50 82 -761 0 CSS-3126-11 X X X HP 5 0 8 2-7 6 1 1 CSS-31 2E 1 1 X X X D j 0.30 F" C f ’t ‘ G " C p N •- 0 .3 0 r~ 'i j N

Contextual Info: SPC560B54x SPC560B60x, SPC560B64x 32-bit MCU family built on the Power Architecture for automotive body electronics applications Datasheet - production data • Dedicated diagnostic module for lighting LQFP100 LQFP144 14 x 14 x 1.4 mm (20 x 20 x 1.4 mm)

HP optocoupler 4100 4200

Abstract: 4100 ir receiver pl4200 PL4100 optocoupler HP 4100 618-4 opto
Contextual Info: OPTICALLY COUPLED 20 mA CURRENT LOOP RECEIVER HCPL-4200 OUTLINE DRAWING* SCHEMATIC 9 .4 0 1,370 9 .9 0 .39 0! lai r1?1! r1?! rsl 'T Y P E N U M B E R I HP x x x x ^ YYWWFU N — ►I 7&C3TO) UL R E C O G N IT IO N 1.78 (.0 7 0 ) M A X . • 1.19 (.0 4 7 ) M A X .

2SB415

Abstract: 2SB 710 2sc1061 2sd524 2sb504 HD68P01 2sb507 2sa762 2sc827 2SC1362
Contextual Info: V W Ki * 91 ^ # b h 7 >->" X ? i, t ^ X M X V M W X M £ (E I A J i: 2 S W Z x R m z t i S , x t iz J :'), ? 4000H£< * ^ t i X t 4 ', ^ i t . : w ° n l l ±, Z iih J M I1 L -C A J t t , g 4 - ? 4 M # c o ( , c o T ' & , I W H H c o f ^ 6 i> w 1, ^ & >) b ') £ i ~

satellite car

Abstract: tyco power modules
Contextual Info: X 1017 / X 1018 – Preliminary Data Sheet Application Pair of antenna amplifiers for use in car and home antennas to receive satellite and terrestrial signals in the North American SDARS frequency range of Sirius Satellite Radio Major Characteristics •

TEFABLOC

Abstract: TEFABLOC to
Contextual Info: LTSR_012010.QXD_LTSR_062006 b .QXD 12/20/12 1:42 PM Page 7 Cable Gland / Industrial Straight-Through - Polyamide Locknuts and seal rings sold separately, see pages 23 and 35. PG PG PG PG PG PG PG PG 7 9 11 13.5 16 21 29 Metric M 16 x M 20 x M 20 x M 25 x M 32 x

Contextual Info: PLL Product Specification Model: Parameter Frequency Range - PLL300-1018 Rev: P3 Date: 9/20/2005 SIRENZA Customer: MICRODEVICES, INC. AppNote: 113 Option 207000 Operating Temperature Range: -35 ° to 85 ° C Min Typ Max Units X 1000 1018 1036 MHz X kHz

Contextual Info: X^ustomer Information Sheej^ IONS IN mm DRAWING No.; F 0 3 H J 0 X X 4 5 R 0.50 x No. OF WAYS + 4.1 0.50 x No, OF PITCHES0.20 TYP- SP E C IFIC A T IO N S ; M ATERIAL; MOULDINGS - 40% F I L L E D PPS U L9 4 V -0 CO N TACTS - HIGH FORMANCE CO PPER A LLO Y

E832

Contextual Info: z . V □PM Dense-Pac Microsystems, Inc. DPE832V 8K X 32 CMOS EEPROM VERSAPAC O DESCRIPTION: The DPE832V is a high-performance Electrically Erasable and Programmable Read O nly M em ory EEPROM module and may be organized as 8K X 32, 16K X 16 or 32K X 8.

C4558

Abstract: c455 CY7C447 C4557 C4556 CY7C455 CY7C456 CY7C457 CY7C455-20JC
Contextual Info: 57 CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags Features • Depth Expansion Capability • 52-pin PLCC and 52-pin PQFP • High-speed, low-power, first-in first-out FIFO memories • 512 x 18 (CY7C455)

C4558

Abstract: C4554 C4557 c455 CY7C455-14JI CY7C455 CY7C456 CY7C457 CY7C447
Contextual Info: CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags • Depth Expansion Capability • 52-pin PLCC and 52-pin PQFP Features • High-speed, low-power, first-in first-out FIFO memories • 512 x 18 (CY7C455)

C4558

Abstract: c455 CY7C455 CY7C456 CY7C457 CY7C447
Contextual Info: 57 CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags Features • Depth Expansion Capability • 52-pin PLCC and 52-pin PQFP • High-speed, low-power, first-in first-out FIFO memories • 512 x 18 (CY7C455)

C4558

Abstract: C4557 c4552 C4555 c4556 C-4555 c4554 c455 CY7C455 CY7C457
Contextual Info: 57 CY7C455 CY7C456 CY7C457 512 x 18, 1K x 18, and 2K x 18 Cascadable Clocked FIFOs with Programmable Flags Features • Depth Expansion Capability • 52-pin PLCC and 52-pin PQFP • High-speed, low-power, first-in first-out FIFO memories • 512 x 18 (CY7C455)

Contextual Info: PRELIMINARY CMOS VIDEO RAM KM428C128 1 2 8 K X 8 Bit CMOS Video RAM FEATURES GENERAL DESCRIPTION • Dual port Architecture 1 28K x 8 bits RAM port 256 x 8 bits SAM port • Performance The Samsung KM 428C128 is a CMOS 128 K X 8 bit Dual Port DRAM. It consists of a 1 2 8 K X 8 dynamic random

ST7565

Abstract: LCD Controller ST7567 1117 ADC Sitronix ST7565 st7565 initial code ME 1117 ST7567 controller ST7565-0A 1117 regulator
Contextual Info: ST Sitronix ST7565 65 x 132 Dot Matrix LCD Controller/Driver FEATURES Direct display of RAM data through the display data RAM. RAM capacity : 65 x 132 = 8580 bits Application Display driver circuits 1/65 duty : 65 common x 132 segment 1/49 duty : 49 common x 132 segment

MPC5604P

Abstract: sdc 7500 scr values MPC5603 MPC5603P airbag RF NPN POWER TRANSISTOR 2 GHZ
Contextual Info: Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5604P Rev. 4, 7/2009 MPC5604P 144 LQFP 20 x 20 x 1.4 mm 100 LQFP 14 x 14 x 1.4 mm MPC5604P Microcontroller Data Sheet • High performance 64 MHz e200z0h CPU – 32-bit Power Architecture Book E CPU