X18BIT Search Results

Contextual Info: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations

Contextual Info: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations

Transfer Clock in FWFT

Contextual Info: AL4CS205 AL4CS215 AL4CS225 AL4CS235 AL4CS245 Data Sheets Version 2.1 AL4CS205/AL4CS215/AL4CS225/AL4CS235/AL4CS245 Amendments 7.10.01 Preliminary version 1.0 10.17.01 Version 1.1, Add DC and AC timing data 11.28.01 Version 1.2, modify 8.5 programmable timing selection

Hitachi DSA00164

Contextual Info: HM67S18258 Series 4M Synchronous Fast Static RAM 256k-words x 18-bits ADE-203-661B(Z) Product Preview, Rev. 2 Nov. 18, 1997 Features • • • • • • • • • • 3.3V ± 5% Operation LVCMOS Compatible Input and Output Synchronous Operation Internal self-timed Late Write

cd 1619 CP

Abstract: RX SOP 1738 bc 494 b f.m transmitter Schematics AL 1450 DV hp 2212 sdc 2025 AL 2450 dv circuit diagram toggle switches 2041 BY TRANSISTOR BC 187 vhdl code for 16 prbs generator
Contextual Info: Stratix II GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V1-4.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

CQ 419

Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
Contextual Info: Section III. Memory This section provides information on the TriMatrix embedded memory blocks internal to Stratix II GX devices and the supported external memory interfaces. This section contains the following chapters: Revision History Altera Corporation

altera stratix II fpga

Abstract: DDR2 sdram pcb layout guidelines vhdl code for watchdog timer of ATM
Contextual Info: Stratix II Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V2-4.3 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

add round key for aes algorithm

Abstract: detail of half adder ic DIN 5463 2-bit half adder handbook texas instruments IC to design 2 by 2 binary multiplier SE 135 pin configuration verilog code for twiddle factor ROM transistor c789 6A ep3sl1501152
Contextual Info: Stratix III Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Version: Document Date: 10.0 2.1 July 2010 Copyright © 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

SECDED

Abstract: EP3SE50
Contextual Info: 4. TriMatrix Embedded Memory Blocks in Stratix III Devices SIII51004-1.8 Introduction TriMatrix embedded memory blocks provide three different sizes of embedded SRAM to efficiently address the needs of Stratix III FPGA designs. TriMatrix memory includes 640- in ROM mode only or 320-bit memory logic array blocks (MLABs),

CQ 419

Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
Contextual Info: Section II. Memory This section provides information on the TriMatrix embedded memory blocks internal to Stratix II devices and the supported external memory interfaces. This section contains the following chapters: Revision History Altera Corporation

Contextual Info: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations

B17C

Abstract: teradyne flex tester AGX52001-1 AGX52002-1 AGX52003-1 AGX52004-1 AGX52005-1 AGX52006-1 AGX52007-1 AGX52008-1
Contextual Info: Arria GX Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com AGX5V2-1.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

ST7735

Abstract: eeprom s190 8080 rgb interfaces 24bit R143 557 000 W Sitronix ST7735 LCM 4004 eeprom s130 TFT 65K colors 128 x 160 pixels S45 P97 st s34 schottky diode
Contextual Info: ST ST7735 262K Color Single-Chip TFT Controller/Driver 1 Introduction The ST7735 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 396 source line and 162 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts Serial

pc keyboard ic

Abstract: altera stratix ii ep2s60 circuit diagram bc 327 K.D carrier detect phase shift finder 15.21 pcie gen 2 payload SIIGX52006-1 free transistor equivalent book DIODE ED 34 transistor bd 242
Contextual Info: Stratix II GX Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V2-4.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

CQ 419

Abstract: CYPRESS CROSS REFERENCE dual port sram EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
Contextual Info: Section III. Memory This section provides information on the TriMatrix embedded memory blocks internal to Stratix II GX devices and the supported external memory interfaces. This section contains the following chapters: Revision History Altera Corporation

free transistor equivalent book

Abstract: HD-SDI over sdh 3D123 CEI 23-16 Chapter 3 Synchronization diode handbook GX 010 texas handbook transistor DATA REFERENCE handbook vhdl code for 16 prbs generator
Contextual Info: Stratix II GX Device Handbook, Volume 2 101 Innovation Drive San Jose, CA 95134 www.altera.com SIIGX5V2-4.3 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

pin configuration of IC 1619

Abstract: pin configuration for half adder U 1560 CQ 245 D 1609 VO A1 JD 1801 dct verilog code jd 1801 data sheet logic diagram to setup adder and subtractor LPM 562 force sensor sensor 3414
Contextual Info: Stratix II Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SII5V1-4.4 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

SN74V3640

Abstract: SN74V3640-6 SN74V3650 SN74V3650-6 SN74V3660 SN74V3660-6 SN74V3670 SN74V3680 SN74V3690
Contextual Info: SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690 1024 x 36, 2048 × 36, 4096 × 36, 8192 × 36, 16384 × 36, 32768 × 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003 D D D D D D D D D Choice of Memory Organizations

AN83

Abstract: IDT720X IDT72211 IDT722X5
Contextual Info: APPLICATION NOTE Width Expansion Of SyncFIFOs AN-83 Clocked FIFOS by Rob De Voto INTRODUCTION The performance requirements of today’s systems are continually reaching to new heights. In response to needs for higher performance, IDT has introduced a family of First-In-First-Out (FIFO) buffers which are ideally suited

sun hold rx1 1240

Abstract: TRANSISTOR K 314 j 6815 transistor NT 407 F TRANSISTOR TO 220 AGX51001-1 AGX51002-1 AGX51003-1 AGX51004-1 AGX51005-1 transistor horizontal c 5936
Contextual Info: Arria GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AGX5V1-1.2 Copyright 2007 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

Contextual Info: Arria II GX Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-2.0 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

EP2AGX260EF

Abstract: "switch power supply" handbook
Contextual Info: Arria II GX Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-1.1 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

TIMER FINDER TYPE 85.32

Abstract: tsmc design rule 40-nm FINDER TYPE 85.32 Texas Instruments Stratix IV EP4S series Power Ref Design 8 tap fir filter verilog FBP BGA
Contextual Info: Stratix IV Device Handbook Volume 1 Stratix IV Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com SIV5V1-4.4 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat.

transistor 5503 dm

Abstract: hpc 3062 power module si 3101 schematic diagram HYBRID SYSTEMS ADC 560-3 lsp 5503 transistor horizontal c 5936 IC transistor linear handbook 4 pins jd 1803 transistor SI 6822
Contextual Info: Stratix III Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Version: Document Date: 10.0 2.2 March 2011 Copyright © 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other