X886 Search Results

vhdl code switch layer 2

Abstract: vhdl code for asynchronous fifo
Contextual Info: UTOPIA Slave CC143S January 10, 2000 C ooreEl MicroSystems CoreEl MicroSystems 46750 Fremont Blvd. #208 Fremont, CA 94538 USA Phone: +1 510-770-2277 Fax: +1 510-770-2288 URL: www.coreel.com E-mail: sales@coreel.com Features • Supports 4000X, Spartan -II, Virtex™, and Virtex™-E

MIGRATE SCALD TO HDL FROM CADENCE

Abstract: X8861 XC2064 XC3090 XC4005 XC5210
Contextual Info: Xilinx/ Concept-HDL Interface Guide Getting Started Using Setup Using Concept-HDL with Xilinx Designs Conducting Simulation Using Genview Upgrading to Concept-HDL Xilinx/Concept-HDL Interface Guide — 2.1i Printed in U.S.A. Xilinx/Concept-HDL Interface Guide

ECA 324

Contextual Info: 19-0485; Rev 0; 4/96 J V IS ÌX A J V V D ual9 Low -Dropout, 100m A L in ear R egulators The devices feature Dual Mode operation: their out­ put voltages are preset at 3.15V for the “T" versions, 2.84V for the “S” versions, or 2.80V for the “R” versions

500 watt power supply circuit diagram 20kHz

Abstract: Marking DA SOT23-5 X8864
Contextual Info: >kiyixi>ki 19-0466; Rev 2 ; 11/98 Low -Dropout, 120mA Linear Regulators _ G e n e r a l D e s c r i p t i o n The devices feature Dual Mode operation: their out­ put voltage is preset at 3.15V for the T versions, 2.84V for the S versions, or 2.80V for the R versions or can be

v1506 diagram

Contextual Info: X_DES Cryptoprocessor February 22, 1999 Product Specification AllianceCORE Facts Core Specifics CAST, Inc. 24 White Birch Drive Pomona, New York 10907 USA Phone: +1 914-354-4945 Fax: +1 914-354-0325 E-Mail: info@cast-inc.com URL: www.cast-inc.com Features

HL6 smd

Abstract: MOSFET ACER ATE rb25 BC458 U12 gp 711 smd T2sb CD224E K1626 BC137 BC116
Contextual Info: % $ 00210-A0.2 10/25/00 CPU DVO I/F 105MHz CuMINE CLK GEN PG.4,5 IMI C9835 0-20% EXT W/SS GTL+ BUS 100MHz PG.3 MEM BUS 100MHz SO-DIMM*2 512MB MAX USB0, 1 PG.26 PG.30,31,32 PHY 82562EM BLUETOOTH PG.24 ATA66 PG.19 SIDE BAY INPUT AD+ DOC_AD+ BAT_A+ BAT_B+ APA2020

amd 2901 alu

Abstract: 4 bit microprocessor using vhdl amd 2901 verilog amd 2901 pinout diagram am 2901 verilog 8 BIT ALU design with verilog 32 BIT ALU design with vhdl basic microprocessor block diagram amd 2901 AM2901
Contextual Info: C2901 Microprocessor Slice January 10, 2000 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core Documentation Core documentation Design File Formats EDIF Netlist; .ngc VHDL/Verilog Source RTL available extra Constraints File

Contextual Info: y k ix x iv M 1 9 -0 4 6 6 , R e v O; 3 /9 6 Low-Dropout, 100mA Linear Regulators The d e v ic e s fe a tu re D ual M o d e o p e ra tio n : th e ir o u t­ p u t v o lta g e is p re s e t at 3.1 5V for the T v e rsio n s, 2.84V for the S v e rs io n s , o r 2.8 0V fo r th e R v e rs io n s or c a n be

K33 SOT23-5

Abstract: AX8867 MAX6667
Contextual Info: >M>JXiyki 19-1302; Rev 0; 10/97 L o w -Noise, L o w - D r o p o u t , 1 5 0 mA L i n e a r R e g u l a t o r s in SOT23 Features The X8867/X8868 low-noise, low -dropout linear regulators operate from a 2.5V to 5.5V input and deliver up to 150mA. Typical output noise for these devices is

pic 123

Contextual Info: Xilinx/ Concept-HDL Interface Guide Getting Started Using Setup Using Concept-HDL with Xilinx Designs Conducting Simulation Using Genview Upgrading to Concept-HDL Xilinx/Concept-HDL Interface Guide — 2.1i Printed in U.S.A. Xilinx/Concept-HDL Interface Guide

vhdl code CRC 32

Abstract: vhdl code for pseudo random sequence generator in "network interface cards" vhdl code for ethernet mac spartan 3
Contextual Info: Fast Ethernet Media Access Controller Transmitter and Receiver Cores February 22, 1999 C ooreEl MicroSystems Product Specification AllianceCORE Facts Core Specifics 4000EX 4028EX-2 Supported Family Device Tested CoreEl MicroSystems CLBs - Transmitter CLBs - Receiver:

amd 2901 alu

Abstract: 8 BIT ALU design with verilog 8 BIT ALU using vhdl amd 2901 pinout diagram 32 BIT ALU design with vhdl amd 2901 verilog 4 bit microprocessor using vhdl 32 bit alu using vhdl 32 bit ALU vhdl am 2901 verilog
Contextual Info: C2901 Microprocessor Slice June 26, 2000 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core Documentation Core documentation Design File Formats EDIF Netlist; .ngc VHDL/Verilog Source RTL available extra Constraints File

LDR 03 PHOTO RESISTOR

Contextual Info: 19-0485; Rev 0 ;4 /9 6 Dual, L o w - D r o p o u t , 1 0 0 m A L i n e a r R e g u l a t o r s _ F e a t u r e s The X8865 and X8866 dual, low -dropout linear regulators operate from a + 2.5V to +5.5V input range and d e liv e r up to 100m A. A t 200 m A to ta l load, the

MARKING AABV

Contextual Info: 19-0466; R ev 1; 3 /9 8 > M > J X i y k i L o w - Dr opout , 1 0 0 mA L i n e a r R e g u l a t o r s Features The X8863T/S/R and X8864T/S/R low-dropout lin­ ear reg ula tors o pe ra te from a + 2.5V to + 6.5V in p u t range and deliver up to 100mA. A PMOS pass transis­

4 bit microprocessor using vhdl

Abstract: amd 2901 8 BIT ALU using vhdl Amd2901 amd 2901 alu amd 2901 verilog microprocessor dual port ram vhdl alu amd 2901 pinout diagram
Contextual Info: ac_cast_c_2901.fm Page 1 Thursday, February 18, 1999 3:37 PM C2901 Microprocessor Slice February 22, 1999 Product Specification AllianceCORE Facts Core Specifics See Table 1 Provided with Core Documentation Core documentation Design File Formats EDIF Netlist; .ngc

Contextual Info: 19-0485; Rev O; 4/96 Dual, Low-Dropout, 100mA L in ear R egulators _ F ea tu res ♦ Low Cost The devices feature Dual Mode operation: their out­ put voltages are preset at 3.15V for the "T" versions, 2.84V for the "S" versions, or 2.80V for the "R" versions

vhdl code for ethernet mac spartan 3

Abstract: vhdl code for 8-bit calculator vhdl code CRC CRC-32 vhdl code for pseudo random sequence generator "network interface cards"
Contextual Info: Fast Ethernet Media Access Controller Transmitter and Receiver Cores January 10, 2000 C ooreEl MicroSystems Product Specification AllianceCORE Facts Core Specifics 4000EX 4028EX-2 Supported Family Device Tested CoreEl MicroSystems CLBs - Transmitter CLBs - Receiver:

china phone BLOCK diagram

Contextual Info: X_DES Cryptoprocessor January 10, 2000 Product Specification AllianceCORE Facts Core Specifics CAST, Inc. 24 White Birch Drive Pomona, New York 10907 USA Phone: +1 914-354-4945 Fax: +1 914-354-0325 E-Mail: info@cast-inc.com URL: www.cast-inc.com Features

capacitor 1nj 400

Abstract: X8862L
Contextual Info: 19-1117: Rev 0 :8 /9 6 L o w - C o s t , L o w - Dr o p o u t , Du a l L i n e a r R e g u l a t o r The X8862 output voltage is preset to 4.95V L , 3.175V (T), or 2.85V (R). This device employs Dual Mode operation, allowing user-adjustable outputs from + 2V to +11V with external resistors. The input

K33 SOT23-5

Abstract: max9067
Contextual Info: 19-1302; Rev 1;3/98 L o w -Noise, L o w - D r o p o u t , 1 5 0 mA L i n e a r R e g u l a t o r s in SOT23 The X8867/X8868 low-noise, low -dropout linear regulators operate from a 2.5V to 6.5V input and deliver up to 150mA. Typical output noise for these devices is

0743A

Abstract: iodelay verilog code for 4 bit multiplier testbench ug406 ML662 ISERDES waveforms for 4 bit multiplier testbench XAPP886 CY7C1412BV18 K7R321882C
Contextual Info: Application Note: Virtex-6 Family Interfacing QDR II SRAM Devices with Virtex-6 FPGAs XAPP886 v1.0 December 2, 2010 Summary Author: Olivier Despaux With an increasing need for lower latency and higher operating frequencies, memory interface IP is becoming more complex and needs to be tailored based on a number of factors such as