DSASW00422091.pdf by Zarlink Semiconductor

Partial File Text ZL30112 SLIC/CODEC DPLL Data Sheet Features November 2007 · Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input · Provides 2.048 MHz and 8.192 MHz output clocks and an 8
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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