DSA00120620.pdf
by Cypress Semiconductor
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PRELIMINARY
CY37192V
UltraLogicTM 3.3V 192-Macrocell ISRTM CPLD
-- tPD = 12 ns
Features
-- tS = 7 ns
· 192 macrocells in twelve logic blocks
· IEEE standard 3.3V operation
-- 3.3V IS
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Original
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Unknown
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Unknown
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Unknown
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