DSASL004908.pdf by Xilinx

Partial File Text 0 R DS016 (v1.1) May 3, 2000 XCR3128XL 128 Macrocell CPLD 0 14 Preliminary Product Specification Features Description · 6.0 ns pin-to-pin logic delays · System freque
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CS144 DS012 jtag pinout TQ144 TQFP 144 PACKAGE footprint VQ100 XCR3128XL