DSA00109152.pdf
by Analog Devices
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a
FUNCTIONAL BLOCK DIAGRAM
AVCC
AIN
TH2
VREF
INTERNAL
TIMING
DIGITAL ERROR CORRECTION LOGIC
MSB
27 D10
LSB
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate is 41 MSPS.
2.
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Original
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Unknown
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Unknown
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Unknown
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